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Clock synchronization method and device

A clock synchronization and clock technology, which is applied in the direction of synchronization devices, time division multiplexing systems, digital transmission systems, etc., can solve the problems affecting the synchronization quality and stability of the synchronization network, the deterioration of the clock performance of downstream equipment, and the topology fluctuation of synchronization links to improve reliability and stability, avoid frequency and phase fluctuations, and ensure consistency

Active Publication Date: 2013-08-14
ZTE CORP
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  • Claims
  • Application Information

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Problems solved by technology

[0009] Therefore, due to the inconsistency between the clock protocol layer and the clock physical layer, in some cases, it will cause turbulence in the synchronization link topology, and the clock performance of downstream devices will deteriorate, affecting the synchronization quality and stability of the synchronization network.

Method used

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Embodiment Construction

[0039] In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

[0040] like figure 2 As shown, an embodiment of the present invention provides a clock synchronization device, including:

[0041] The optimal clock source selection module is used to select a clock source;

[0042] A phase-locked loop state detection module, used to check the current state of the phase-locked loop after the optimal clock source selection module selects the clock source;

[0043] The clock output module is connected with the best clock source selection module and the phase-locked loop state detection module, and is used to send the clock source to the down...

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Abstract

A clock synchronization method comprises: a synchronization device selecting a clock source, inspecting the current status of a phase-locked loop, and determining a clock quality level to be sent to a downstream device according to the selected clock source and the current status of the phase-locked loop. A clock synchronization device comprises an optimum clock source selecting module which is set for selecting a clock source; a phase-locked loop status detecting module which is set for inspecting the current status of the phase-locked loop after the optimum clock source selecting module selects the clock source; and a clock output module which is set for determining a clock quality level to be sent to a downstream device according to the clock source selected by the optimum clock source selecting module and the current status of the phase-locked loop. The solution ensures the consistency of a clock protocol layer and a clock physical layer, avoids frequency and phase fluctuations caused by the incorrect or premature routing of a downstream device of a clock synchronization network, and increases the clock synchronization reliability and stability.

Description

technical field [0001] The invention relates to a clock synchronization communication network, in particular to a clock synchronization method and device in the clock synchronization network. Background technique [0002] With the rapid development of Ethernet and 3G (3rd Generation, third generation) networks, clock and time synchronization in packet networks has received more and more attention and has been widely used. Domestic and foreign operators continue to use synchronous Ethernet to realize clock synchronization, adopt 1588 protocol for time synchronization, and gradually replace the method of using GPS (Global Positioning System, Global Positioning System) for time synchronization. [0003] The existing ITU-T G.781 clock synchronization standard stipulates that during timing transmission, the clock quality level information is transmitted downward through the synchronization status message (Synchronization Status Message, SSM). When using PTP to achieve clock synch...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/06
CPCH04J3/06H04L7/033H04J3/0641
Inventor 张君辉王德龙
Owner ZTE CORP