Chip package structure and manufacturing method thereof
A chip packaging structure, chip technology, applied in the direction of microstructure technology, microstructure devices, manufacturing microstructure devices, etc., can solve the problems of unfavorable micro devices, large size, use value and elastic limitations
Active Publication Date: 2017-06-06
ADVANCED SEMICON ENG INC
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- Abstract
- Description
- Claims
- Application Information
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Problems solved by technology
However, the MEMS microphone package has a large size, so it is not conducive to be applied to miniature devices, and the use value and flexibility are limited
Method used
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Embodiment Construction
[0022] Please refer to figure 1 , Which shows the chip package structure 102 according to an embodiment, including a substrate 104, an acoustic transducer chip 106, a cap 108, and an encapsulant 110.
[0023] The substrate 104 has a first substrate surface 112 and a second substrate surface 114 opposite to each other. A circuit layer 116 is provided on the surface 112 of the first substrate. The insulating layer 118 is disposed on the circuit layer 116 and has several openings 120 and 121 to expose a part of the circuit layer 116. The substrate 104 has a sound hole 122 for receiving external sound waves.
[0024] The electroacoustic chip 106 can be configured on the first substrate surface 112 of the substrate 104 by flip chip technology, and is electrically connected to the circuit layer 116 through the conductive pad 126 on the active surface 124 and the conductive bump 128 filling the opening 120. The active surface 124 of the electroacoustic chip 106 faces the acoustic hole 1...
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A chip packaging structure and a manufacturing method thereof. The chip packaging structure includes a base plate, an electroacoustic wave chip, a cover structure and sealing colloid. The substrate has a first substrate surface, a second substrate surface and acoustic holes opposite to each other. There is a circuit layer on the surface of the first substrate. The electroacoustic wave chip is configured on the first substrate surface of the substrate and is electrically connected to the circuit layer. An active surface of the electroacoustic chip is facing the acoustic hole. The cover structure is arranged on the first substrate surface of the substrate, and has an accommodating space for accommodating the electroacoustic wave chip. The encapsulant wraps the covering structure and the circuit layer outside the covering structure. One of the substrate and the encapsulant has several conductive through holes. The conductive through hole is in direct contact with the circuit layer, and is electrically connected to the electroacoustic wave chip through the circuit layer.
Description
Technical field [0001] The present invention relates to a chip packaging structure and manufacturing method thereof, and more particularly to a silicon MEMS microphone chip packaging structure and manufacturing method thereof. Background technique [0002] Generally, a microelectromechanical microphone package is a microelectromechanical microphone chip and other chips such as an application-specific integrated circuit (ASIC), a read integrated circuit chip, etc., are arranged on a single substrate, and all the chips are covered by a mask with a housing space. Among them, the different chips are electrically connected to each other using traces. However, the MEMS microphone package has a large size, which is not conducive to being applied to a micro device, and its use value and flexibility are limited. Summary of the invention [0003] The invention relates to a chip packaging structure and a manufacturing method thereof. The chip package structure has a tiny size. [0004] Acco...
Claims
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IPC IPC(8): H04R31/00B81B7/00B81C1/00
CPCH01L2224/97H01L2224/16225H01L2924/15151
Inventor 尚-马克·洋诺
Owner ADVANCED SEMICON ENG INC