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Method for improving instruction operation efficiency of soc processor when encrypting text data

A technology of processor instruction and computing efficiency, applied in electrical digital data processing, instruments, computing and other directions, can solve problems such as low efficiency, low computing efficiency, and no consideration of processor efficiency, so as to improve efficiency and speed. Effect

Inactive Publication Date: 2015-12-09
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Due to the specificity of the application field described in the permutation operation, the design of many general-purpose embedded processors does not take into account the efficiency of the processor in performing permutation operations, and some embedded Processor, by specially designing a dedicated instruction set to achieve the purpose of improving the efficiency of encryption and decryption operations
Therefore, if it is necessary to use a general-purpose processor to implement encryption and decryption operations due to technical or commercial reasons, it will inevitably face a problem of low operational efficiency.
One of the development trends of current SoC processors is that the processing bit width will become larger and larger. If general-purpose instructions are used in general-purpose processors to perform replacement operations in encryption and decryption operations, each operation can only operate 1 bit, and the efficiency is relatively high. low

Method used

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  • Method for improving instruction operation efficiency of soc processor when encrypting text data
  • Method for improving instruction operation efficiency of soc processor when encrypting text data
  • Method for improving instruction operation efficiency of soc processor when encrypting text data

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Embodiment Construction

[0014] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It is assumed that the processor is a 64-bit processor, and the encryption of text data using the DES algorithm is taken as an example.

[0015] The basic steps of using the DES algorithm to encrypt text data is to first perform a shift operation on a set of 64-bit plaintext, namely figure 1 The IP replacement operation in . After the operation is completed, it is divided into high 32 bits and low 32 bits, which are and . Then after 16 rounds of the same operation, each round is specifically: . After completing 16 rounds of calculations, finally merge the two sets of 32-bit data and perform the operation again figure 1 middle By permutation operation, the final 64-bit ciphertext can be obtained.

[0016] while performing IP and When the permutation operation is performed, the content of the present invention can be used. ...

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Abstract

The invention discloses a method for improving SoC processor instruction computational efficiency during encryption of text data. The method comprises a preprocessing stage, a computational stage and a postprocessing stage. The preprocessing stage comprises the steps of extracting corresponding digits in each set of plaintexts required to be processed, reconstituting a set of data, and storing the data in an internal storage according to a sequence to be used by the computational stage. The computational stage comprises the step of moving relative positions in the internal storage in each set of data according to a specific rule of replacement computation. The postprocessing stage comprises the step of reinserting digits in each set of data after the computational stage into corresponding digits in corresponding results of each set of data according to a precedence sequence. According to the method for improving the SoC processor instruction computational efficiency during the encryption of the text data, under the condition that specially-designed encryption and decryption computational instructions are not required to be used, the efficiency of processor instruction execution replacement computation is greatly improved, and therefore the speed of a general processor during the displacement computation is improved.

Description

technical field [0001] The invention relates to a method for improving the instruction efficiency of SoC processors when performing replacement operations when encrypting text data, especially relates to the SoC in which the processor has a wide bit width and the processor has no specially designed replacement operation instructions. In this case, a new method that can be used when performing permutation operations on data. Background technique [0002] The permutation operation is an operation that is frequently used in a specific field, such as the field of encryption and decryption operations. Due to the specificity of the application field described in the permutation operation, the design of many general-purpose embedded processors does not take into account the efficiency of the processor in performing permutation operations, and some embedded The processor realizes the purpose of improving the efficiency of encryption and decryption operations by specially designing ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/315
Inventor 沈海斌蒋德
Owner ZHEJIANG UNIV