Method for improving instruction operation efficiency of soc processor when encrypting text data
A technology of processor instruction and computing efficiency, applied in electrical digital data processing, instruments, computing and other directions, can solve problems such as low efficiency, low computing efficiency, and no consideration of processor efficiency, so as to improve efficiency and speed. Effect
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[0014] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It is assumed that the processor is a 64-bit processor, and the encryption of text data using the DES algorithm is taken as an example.
[0015] The basic steps of using the DES algorithm to encrypt text data is to first perform a shift operation on a set of 64-bit plaintext, namely figure 1 The IP replacement operation in . After the operation is completed, it is divided into high 32 bits and low 32 bits, which are and . Then after 16 rounds of the same operation, each round is specifically: . After completing 16 rounds of calculations, finally merge the two sets of 32-bit data and perform the operation again figure 1 middle By permutation operation, the final 64-bit ciphertext can be obtained.
[0016] while performing IP and When the permutation operation is performed, the content of the present invention can be used. ...
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