Etch first and then seal three-dimensional system-level chip flip-chip bump packaging structure and process method

Abstract

The invention relates to a packaging-prior-to-etching type three-dimensional system-level chip-flipped bump packaging structure and a process method thereof. The structure comprises a pad and pins, wherein a first chip is arranged on the front surface of the pad; second chips are flipped on the back surfaces of the pad and the pins through bottom filling adhesives; the front surfaces of the first chip and the pins are connected through metal wires; conductive columns are arranged on the front surfaces of the pins; molding compounds are encapsulated in the peripheral area of the pad, the areas between the pad and the pins and between each two pins, the upper areas of the pad and the pins, the lower areas of the pad and the pins, and the external areas of the first chip, the second chips, the metal wires and the conductive columns; anti-oxidation layers are plated on the surfaces, exposed from the molding compounds, of the pins and the conductive columns; and metal balls are arranged on the tops of the conductive columns. By virtue of the packaging-prior-to-etching type three-dimensional system-level chip-flipped bump packaging structure and the process method thereof, the problem of limitation of the whole packaging functional integrity caused by difficulty in embedding of an object into a conventional metal lead frame or a conventional organic substrate can be solved.

Description

technical field [0001] The invention relates to a three-dimensional system level chip flip-chip bump package structure and process method which are etched first and sealed later. It belongs to the technical field of semiconductor packaging. Background technique [0002] Traditional four-sided leadless metal lead frame package structure such as Figure 81 As shown, the main manufacturing process is to take metal sheets for chemical etching and metal plating to make a base island for carrying chips and a metal lead frame with inner and outer pins, and then perform one-sided chip loading and wire bonding on this basis. , encapsulation and other packaging processes. [0003] The traditional organic multilayer circuit substrate packaging structure such as Figure 82 As shown, the main process is to form a multi-layer circuit board by stacking the core material of the glass fiber board by accumulating materials, opening holes between the circuit layers by laser drilling, and the...

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to overcome the above-mentioned shortcomings, and provide a three-dimensional system-in-package structure and process method for sealing first and then etching chips, which can solve the problem that traditional metal lead frames or multilayer circuit substrates cannot embed chips and passive components. The problem of packaging function integration and traditional organic substrates require thinner line width and narrower line-to-line spacing

Images