The preamplifier circuit of the cmos comparator

Abstract

The invention discloses a pre-amplifier circuit of a CMOS comparator to solve the technical problem that an existing pre-amplifier circuit operates slowly. According to the technical scheme, an NMOS transistor MN1 and an NMOS transistor MN2 serve as differential input geminate transistors. A PMOS transistor MP1 and a PMOS transistor MP2 serve as loads, and a switch S1 and a switch S2 are connected between a grid electrode and a drain electrode of the PMOS transistor MP1 and between a grid electrode and a drain electrode of the PMOS transistor MP2 respectively. One end of a storage capacitor C1 and one end of a storage capacitor C2 are connected to the grid electrode of the PMOS transistor MP1 and the grid electrode of the PMOS transistor MP2 respectively, and the other end of the storage capacitor C1 and the other end of the storage capacitor C2 are connected to a power source VDD. Due to the fact that the storage capacitor C1 and the storage capacitor C2 are not arranged on a signal channel, the output pole and the bandwidth of a pre-amplifier are not affected, the offset voltage is eliminated, and the operating speed of the pre-amplifier is not affected. Therefore, the pre-amplifier circuit of the CMOS comparator has the advantages of being high in speed and precision.

Description

technical field [0001] The invention relates to a preamplifier circuit, in particular to a preamplifier circuit of a CMOS comparator. Background technique [0002] In electronic information processing systems, high-speed and high-precision analog-to-digital converters are required to convert analog signals to digital signals. The comparator is the core circuit of the analog-to-digital converter, and the speed and precision of the comparator determine the overall performance of the analog-to-digital converter. To increase the accuracy and speed of a comparator, it is usually necessary to take steps to remove the offset voltage of the comparator. [0003] refer to Figure 4 . The document "BehzadRazavi, Principles of Data Convention System Design, pp.201~202" discloses a comparator structure for eliminating output offset voltage. The comparator is composed of two parts, a preamplifier and a latch, and adds a calibration circuit. Its working principle is that during the off...

AI Technical Summary

Problems solved by technology

But the disadvantage of this scheme is that due to the introduction of additional storage capacitor C on the signal path 1 and C 2 , so that the main pole frequency of the preamplifier is reduced and the bandwidth is narrowed, thereby reducing the action speed of the comparator

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