Method and system for automatic clock-gating of clock grid at clock source

Abstract

A system and method for power management by performing clock-gating at a clock source. In the method a critical stall condition is detected within a clocked component of a core of a processing unit. The core includes one or more clocked components synchronized in operation by a clock signal distributed by a clock grid. The clock grid is clock-gated to suspend distribution of the clock signal to the core during the critical stall condition.

Description

Background technique [0001] High-frequency microprocessors, as well as other computing engines, often use clock grids (instead of clock trees) as a global clock distribution mechanism to reduce clock uncertainty and make more of the nominal clock cycles available for computation. [0002] On the other hand, when a clock tree is used for clock distribution, most of the global clock distribution network can be relatively easily gated, thereby eliminating a large amount of global clock distribution (active / dynamic) power in a relatively localized manner. [0003] On the other hand, however, clock grids are not easily gated when compared to clock trees for power management purposes. While a clock grid has a frequency advantage and thus a conceptual energy efficiency advantage when active, the clock grid has a frequency advantage when the microprocessor is inactive, such as when waiting for information from memory that the processor cannot continue without. Has some power disadvan...

AI Technical Summary

Problems solved by technology

[0006] However, software-controlled power management solutions do not help in saving power in dynamic and / or critical situations because software cannot recognize in a timely manner when a critical situation exists

For example, a software-controlled management solution cannot determine when an instruction branch will mispredict and then search for the appropriate instruction and / or data in lower-level caches or underlying memory systems

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