Method of forming fin and method of forming fin field effect transistor

A fin-type field effect and transistor technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems that it is difficult for FinFET to obtain technology nodes, and the performance of transistors needs to be further improved, so as to achieve size reduction and reduction Defects, the effect of ensuring uniformity

Active Publication Date: 2016-03-16
SEMICON MFG INT (SHANGHAI) CORP
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  • Application Information

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Problems solved by technology

In the prior art, the gate structure is directly formed on the substrate and the fins after the fins are formed, and due to the limitations of the existing process, such as the limitation of photolithography resolution, it is difficult to obtain a breakthrough in the technology node in the size of FinFET , the performance of the transistor also needs to be further improved

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  • Method of forming fin and method of forming fin field effect transistor
  • Method of forming fin and method of forming fin field effect transistor
  • Method of forming fin and method of forming fin field effect transistor

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Experimental program
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Embodiment Construction

[0032] As mentioned in the background art, it is difficult to further reduce the technology node of the fin size by the method of forming the fin in the prior art, and the performance of the fabricated fin field effect transistor is not stable enough.

[0033] After research, it is found that it is difficult to further reduce the size of the fin portion of the FinFET due to the limitation of the existing technology such as single photolithography or etching process due to the limitation of its own technology such as photolithography resolution. Further, in the prior art, there is a gap between the fin and the gate, and there is a leakage current, which affects the performance and stability of the device.

[0034] Further studies have found that the reason for the gap between the fin and the gate is that the existing technology uses chemical etching or reactive ion etching when forming the fin to cause damage to the surface of the fin, resulting in gaps on the surface of the fin...

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Abstract

The invention provides a method for forming a fin portion and a method for forming a fin field effect transistor. The method for forming the fin portion comprises the following steps: providing a semiconductor substrate, wherein the surface of the semiconductor substrate is provided with an insulation layer and a first fin portion, the first fin portion runs through the insulation layer, and the height of the insulation layer is lower than that of the first fin portion; forming a plasma doping layer on the surface of the first fin portion, wherein the plasma doping layer is a uniform amorphous phase layer; and etching the plasma doping layer and forming a second fin portion, wherein the dimension of the second fin portion is smaller than that of the first fin portion. Through adopting the technical scheme in the invention, the dimension of the fin portion of the fin field effect transistor can be further thinned, and thus the high-performance fin field effect transistor is formed.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a method for forming a fin and a method for forming a fin field effect transistor. Background technique [0002] As we all know, transistors are key components in integrated circuits. In order to increase the operating speed of the transistor, it is necessary to increase the driving current of the transistor. And because the drive current of the transistor is proportional to the gate width of the transistor, to increase the drive current, the gate width needs to be increased. However, increasing the gate width conflicted with the scaling down of the semiconductor itself, leading to the development of the Fin Field Effect Transistor (FinFET). [0003] Similar to the development of traditional two-dimensional CMOS transistors, the feature size of FinFETs is also being further reduced. It is quite difficult to manufacture FinFETs with such a small size for existing technolo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/336
CPCH01L29/66803H01L29/66818
Inventor 何永根
Owner SEMICON MFG INT (SHANGHAI) CORP
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