Copper-nickel alloy encapsulated pin grid array type integrated circuit

Abstract

The invention relates to a copper-nickel alloy encapsulated pin grid array type integrated circuit which comprises an integrated circuit chip and an encapsulating frame. Steps protruding inwards are arranged on the four inner side walls of the encapsulating frame, guide pillars are arranged in auxiliary holes, guide holes matched with pins on the integrated circuit chip are formed in the centers of the guide pillars, the guide pillars are located in the guide holes through riveting edges, a groove is formed in the outer side walls of the integrated circuit chip in the circumferential direction, an annular sealing groove corresponding to the groove is formed in the inner side walls of the encapsulating frame in the circumferential direction, the annular sealing groove is located above the steps, and an annular sealing ring is arranged between the groove and the annular sealing groove. According to the copper-nickel alloy encapsulated pin grid array type integrated circuit, the design of the guide pillars is adopted, and thus the pins are well protected in the using process; dust can be effectively prevented from making contact with the pins by using the design of the sealing ring; good heat dissipating performance can be achieved by using the encapsulating frame made of copper-nickel alloy.

Description

technical field [0001] The invention relates to the field of integrated circuit packaging, in particular to a copper-nickel alloy packaged pin grid array integrated circuit. Background technique [0002] With the rapid development of microelectronics technology, the integration of integrated circuits is getting higher and higher, the functions are getting stronger, and the number of pins is increasing, which promotes the rapid development of the packaging technology of integrated circuits. The packaging form of integrated circuits From metal shell multi-pin packaging, to single-inline or multi-in-line packaging, flat packaging, pin grid array packaging, ball grid array packaging, and then to chip-level packaging, after several generations of development, the technical indicators are changing from generation to generation. Advanced, the number of pins ranges from a few to hundreds or thousands, forming a wide variety of integrated circuit packaging forms. [0003] At present...

AI Technical Summary

Problems solved by technology

[0003] At present, integrated circuits packaged in pin grid arrays are likely to cause bending of the pins of the integrated circuits, poor contact of the pins, and failure to have a good heat dissipation function during use, thereby affecting the use of the integrated circuits. performance and normal use

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