Eutectic bonding material-series structure used for wafer-level encapsulation

A wafer-level packaging and bonding material technology, which is applied in the manufacture of electrical components, electrical solid devices, semiconductor/solid devices, etc., can solve problems such as weak adhesion and reduced strength, and achieve the effect of avoiding bonding failure

Inactive Publication Date: 2014-03-19
JIANGSU AITEMAN ELECTRONICS TECH
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  • Abstract
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  • Claims
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Problems solved by technology

[0006] The main purpose of the present invention is to provide a ternary eutectic bonding material system structure for wafer-level packaging, to solve the problem caused by the weak adhesion between the substrate and the bonding layer in the traditional eutectic bonding technology. strength drop problem

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  • Eutectic bonding material-series structure used for wafer-level encapsulation
  • Eutectic bonding material-series structure used for wafer-level encapsulation

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Embodiment Construction

[0019] The present invention provides as figure 1 A eutectic bonding material system structure for wafer level packaging is shown, the structure includes a first substrate 1, a second substrate 2, a first bonding material 3 and a second bonding material 4; The first substrate 1 and the second substrate 2 and the first bonding material 3 and the second bonding material 4 are respectively composed of three kinds of materials that can form a ternary eutectic alloy; before bonding, the first bonding material 3 is directly attached to the first substrate 1, and the second bonding material 4 is directly attached to the second substrate 2.

[0020] Such as figure 2 As shown, in the bonding process, when the temperature reaches the melting point of the ternary eutectic and the pressure is appropriate, the first bonding material and the second bonding material and the surfaces of the first substrate 1 and the second substrate 2 form a liquid state The ternary eutectic alloy 5.

[0...

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Abstract

The invention discloses a eutectic bonding material-series structure used for wafer-level encapsulation. The eutectic bonding material-series structure is characterized in that the structure comprises a first substrate, a second substrate, a first bonding material and a second bonding material; the first substrate, the second substrate, the first bonding material and the second bonding material are respectively composed of three kinds of ternary eutectic alloy materials; before bonding, the first bonding material is adhered to the first substrate, and the second bonding material is adhered to the second substrate. According to the eutectic bonding material-series structure used for the wafer-level encapsulation provided by the invention, eutectic reaction not only occurs between the bonding materials at the surfaces of the substrates, but also occurs between the substrates and the bonding materials, and therefore, problems such as bonding failure and low reliability caused by the adhesion between the substrates and the eutectic alloy layers in a traditional wafer-level eutectic bonding technology in which the eutectic alloy layers are adopted as a middle medium can be solved.

Description

technical field [0001] The invention relates to the technical field of eutectic bonding in wafer-level hermetic packaging technology, in particular to a eutectic bonding material system structure for wafer-level packaging. Background technique [0002] Packaging is a very important part of the micro-manufacturing process, and wafer-level packaging technology is one of the most important packaging technologies for Micro-Electro-Mechanical Systems (MEMS), because it can effectively avoid dicing and Subsequent processes such as assembly will damage the movable and sensitive structures in the MEMS chip, improve the cleanliness of the MEMS device, improve the packaging yield and reliability, and reduce packaging costs. [0003] The technical focus of realizing wafer-level packaging lies in the bonding of the two wafers of the cover and the substrate. Wafer-level bonding technology is to combine two wafers with each other, and make the surface atoms react with each other, so that...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/60H01L21/50
CPCH01L24/13H01L24/32
Inventor 焦斌斌
Owner JIANGSU AITEMAN ELECTRONICS TECH
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