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Wiring board with embedded device, built-in stopper and electromagnetic shielding

A technology of embedded components and positioning parts, which is applied in the direction of printed circuits, circuits, and electrical components connected to non-printed electrical components, and can solve problems such as low yield, poor alignment, and misalignment of semiconductor components.

Inactive Publication Date: 2014-04-09
BRIDGE SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This structure ensures excellent electrical shielding of embedded components in a small space, but the depth of the conductive blind via needs to be as thick as the semiconductor component, so the drilling and coating of the hole is limited by the high aspect ratio, and can only accommodate some super thin components
In addition, since the recessed part as the chip placement area is formed after the metallization of the conductive blind hole, the misalignment of the semiconductor element is caused by the poor alignment, and the yield of this method is extremely low in mass production.

Method used

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  • Wiring board with embedded device, built-in stopper and electromagnetic shielding
  • Wiring board with embedded device, built-in stopper and electromagnetic shielding
  • Wiring board with embedded device, built-in stopper and electromagnetic shielding

Examples

Experimental program
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Effect test

Embodiment 1

[0053] Figure 1-8It is a cross-sectional view of a method for preparing a circuit board in an embodiment of the present invention, the circuit board includes a positioning member, a semiconductor element, a reinforcement layer, double build-up circuits, and covered through holes.

[0054] Such as Figure 8 As shown, the circuit board 100 includes a spacer 113 , a semiconductor element 31 , a reinforcement layer 41 , a first build-up circuit 201 , a second build-up circuit 202 , and a covered through-hole 515 . The semiconductor device 31 includes an active surface 311 , an inactive surface 313 opposite to the active surface 311 , and a plurality of contact pads 312 on the active surface 311 . The first build-up circuit 201 includes a first insulating layer 211 and a first wire 215 , and is electrically connected to the semiconductor device 31 through a plurality of first conductive blind holes 217 . The second build-up circuit 202 includes a second insulating layer 221 and a...

Embodiment 2

[0075] Figures 9 to 12 According to another embodiment of the present invention, a cross-sectional view of a method for preparing another circuit board, the circuit board includes a shielding cover and a shielding sidewall electrically connected to the ground contact pad of the semiconductor element through a conductive blind hole.

[0076] For the purpose of brevity, any statement in Example 1 may be incorporated into the same application section here, and the same statement will not be repeated.

[0077] Figure 9 By Figure 1~5 The cross-sectional view of the structure formed by the same steps shown, except that the semiconductor element 31 disposed on the dielectric layer 13 has its inactive surface 313 facing the dielectric layer 13, and the positioning member 113 extends beyond the semiconductor element 31 in the upward direction The inactive surface 313 of .

[0078] Figure 10 It is a cross-sectional view of the structure in which the first insulating layer 211 an...

Embodiment 3

[0084] Figure 13 ~ Figure 15 According to another embodiment of the present invention, it is a cross-sectional view of a method for preparing a patterned conductive layer electrically connected to a shielding cover and a reinforcing layer through a conductive trench.

[0085] For the purpose of brevity, any statement in Example 1 may be incorporated into the same application section here, and the same statement will not be repeated.

[0086] Figure 13 By Figure 9-10 Cross-sectional view of the structure fabricated by the steps shown in .

[0087] Figure 14 as well as Figure 14 A is a cross-sectional view and a bottom view of the structure having the first blind hole 213 , the trench opening 222 , and the through hole 511 , respectively. The first blind hole 213 extends through the first insulating layer 211 and the metal layer 21 to expose the contact pad 312 of the semiconductor device 31 in an upward direction. The trench opening 222 extends through the support pl...

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Abstract

The invention discloses a wiring board with embedded device, built-in stopper and electromagnetic shielding. The wiring board includes a stopper, a semiconductor device, a stiffener with shielding sidewalls, a first build-up circuitry and a second build-up circuitry with a shielding lid. The first and second build-up circuitries cover the semiconductor device, the stopper and the stiffener in the opposite vertical directions. The shielding sidewalls and the shielding lid are electrically connected to at least one ground contact pad of the semiconductor device by the first build-up circuitry and can respectively serve as effective horizontal and vertical electromagnetic shields for the semiconductor device within the aperture of the stiffener.

Description

technical field [0001] The invention relates to a circuit board with built-in elements, built-in positioning parts, and electromagnetic shielding, in particular to a circuit board with a shielding cover and a shielding side wall, wherein the shielding cover and the shielding side wall can be respectively used as built-in components vertical and horizontal barriers. Background technique [0002] Semiconductor devices are susceptible to electromagnetic interference (EMI) or other internal components such as capacitive, inductive, conductive coupling, etc. when operating in high frequency mode. The severity of these undesirable interferences can increase substantially when semiconductor chips are placed in close proximity to each other for miniaturization. To reduce electromagnetic interference, shielding may be required on certain semiconductor components and modules. [0003] U.S. Patent 8,102,032 to Bolognia et al., U.S. Patent 8,105,872 to Pagaila et al., U.S. Patent No. ...

Claims

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Application Information

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IPC IPC(8): H05K1/18H05K1/02H01L23/498H01L23/538H01L23/552
CPCH01L2224/92144H01L24/19H01L2224/8314H01L2224/73267H01L2224/04105H01L2924/3025H01L2224/19H01L2924/3511H01L2924/00012
Inventor 林文强王家忠陈振重
Owner BRIDGE SEMICON