Semiconductor device and manufacturing method thereof

Abstract

The present invention provides a CoC-connected semiconductor device that does not hinder electrical contact between external electrodes and bonding wires, and does not hinder miniaturization and mass production. It has: a rectangular lower semiconductor element; a plurality of external electrodes arranged along the sides of the lower semiconductor element and formed on the lower semiconductor element; electrically connected to the plurality of external electrodes through a plurality of wiring patterns, respectively, and A plurality of internal electrodes arranged and formed on the lower semiconductor element; formed as a partition wall pattern surrounding each of the plurality of external electrodes or each plurality; mounted on the lower side in such a manner that a plurality of terminals are electrically connected to the plurality of internal electrodes, respectively. the upper semiconductor element on the side semiconductor element; and the resin formed by dripping and flowing between the lower semiconductor element and the upper semiconductor element.

Description

technical field [0001] The present invention relates to a semiconductor device and its manufacturing method. In particular, in a semiconductor device having a CoC (chip on chip; stacked chip) structure, it relates to preventing underfilling (underfiling) resin from flowing into the external electrodes (peripheral parts) of the lower semiconductor element regardless of the size of the upper semiconductor element. electrode), a highly reliable semiconductor device and a manufacturing method thereof. Background technique [0002] In the past, semiconductor devices with a CoC (stacked chip) connection structure have been studied, and the Figure 8 The specific structure thereof will be described. That is, the upper semiconductor chip 5 is flip-chip mounted on the lower semiconductor chip 6 on which the electrodes 9 are formed on the surface via the bumps 8 . The space between the lower semiconductor chip 6 and the upper semiconductor chip 5 and the bumps 8 are covered with the...

AI Technical Summary

Problems solved by technology

[0010] However, in a conventional CoC-connected semiconductor device, if the underfill resin 4 flowing in the outward direction passes over the partition wall 11, the underfill resin 4 will cover most of the surface of the external electrode 9, and as a result, the external electrode 9 will be blocked. Electrical contact between electrode 9 and bonding wire 10

In order to avoid such a problem, the distance between the partition wall 11 and the upper semiconductor chip 5 must be sufficiently set, and the amount of the underfill resin 4 must be strictly controlled, which will hinder the miniaturization and mass production of semiconductor devices.

In addition, in a conventional CoC-connected semiconductor device, since the partition wall 11 surrounds the internal electrodes in a single line, there is a possibility that the barrier ribs 11 may fall off during the heat treatment process or by dripping of the resin.

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