ccd vertical timing drive circuit

Abstract

The invention discloses a vertical time sequence drive circuit for a charge coupled device (CCD). The vertical time sequence drive circuit comprises a switch module, a voltage stabilizing circuit, a power amplitude amplifying circuit, a high-level direct current source and a low-level direct current source, wherein the power amplitude amplifying circuit can process one of the high-level direct current source and the low-level direct current source and outputs outwards through the output end; the voltage stabilizing circuit can provide four paths of control signals; the switch module can control the action of the power amplitude amplifying circuit by controlling four paths of control signals. The vertical time sequence drive circuit has the beneficial technical effects that a test circuit can generate corresponding CCD drive signals according to different time sequence pulses; one set of test circuit can meet the test requirements of different types of CCDs, the hardware consumption in the test process is reduced, fussy work in the prior art that drive circuits need to be independently designed for different types of CCDs is avoided, and the test work efficiency is indirectly improved.

Description

technical field [0001] The invention relates to a device for testing a CCD, in particular to a CCD vertical timing drive circuit. Background technique [0002] In the prior art, when the CCD is tested, the conventional design idea is: for each kind of CCD, a set of driving timing and driving circuit are separately designed, and the typical CCD vertical timing driving circuit is such as the vertical driving circuit introduced by Kadak Company (KODAK KAI-0340 CCD IMAGE SENSORIMAGER EVALUATION BOARDUSERS MANUAL, REVISION1.0APRIL 19, 2004), this circuit is aimed at the working characteristics of the clock phase Φvi pulse in the imaging area of ​​CCD devices with different structures requiring a long time in "H" or "L", the vertical drive circuit Correspondingly, two circuit structures of "H" clamp or "L" clamp are also designed, but there are differences in the structure of the two circuits of "H" clamp and "L" clamp, resulting in the vertical drive circuit of the finished produ...

AI Technical Summary

Problems solved by technology

[0002] In the prior art, when the CCD is tested, the conventional design idea is: for each kind of CCD, a set of driving timing and driving circuit are separately designed, and the typical CCD vertical timing driving circuit is such as the vertical driving circuit introduced by Kadak Company (KODAK KAI-0340 CCD IMAGE SENSORIMAGER EVALUATION BOARDUSERS MANUAL, REVISION1.0APRIL 19, 2004), this circuit is aimed at the working characteristics of the clock phase Φvi pulse in the imaging area of ​​CCD devices with different structures requiring a long time in "H" or "L", the vertical drive circuit Correspondingly, two circuit structures of "H" clamp or "L" clamp are also designed, but there are differences in the structure of the two circuits of "H" clamp and "L" clamp, resulting in the vertical drive circuit of the finished product It can only adapt to a specific type of CCD drive requirements, and cannot be used for other purposes. This vertical drive circuit is not universal, so in production, it is necessary to redesign the drive circuit separately for different types of CCDs. The workload and The hardware consumption is large, and it is very cumbersome, and the production cost is high

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