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A laterally diffused semiconductor device

A semiconductor and device technology, applied in the field of laterally diffused semiconductor devices, can solve the problems of device damage, low breakdown voltage, and failure to meet the needs of device development.

Active Publication Date: 2018-10-23
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the LDMOS of the structure still has a source-drain breakdown voltage (Breakdown Voltage between Drain and Source, BVDS) is still low, which cannot meet the needs of further development of the device. When the source-drain breakdown voltage (Breakdown Voltage between Drain and Source, BVDS) exceeds 12V, the source and drain are broken down, causing device damage
[0005] Therefore, although LDMOS has many characteristics that conventional transistors do not have, the development and application of said LDMOS are largely limited due to its low breakdown voltage, so it is necessary to improve the structure of existing LDMOS to Further improve the source-drain breakdown voltage of LDMOS and further improve the performance of LDMOS transistors

Method used

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  • A laterally diffused semiconductor device
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Embodiment Construction

[0028] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0029] In order to thoroughly understand the present invention, a detailed description will be provided in the following description to illustrate the semiconductor device with controllable height fins and the manufacturing method thereof of the present invention. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the semiconductor arts. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions. ...

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Abstract

The invention relates to a horizontal diffusing semiconductor device which comprises a semiconductor substrate, a first well region provided with a first conducting type and arranged in the semiconductor substrate, a drain electrode region arranged in the first well region, a second well region provided with a second conducting type and arranged in the semiconductor substrate on the outer side of the first well region, a source electrode region arranged on the outer side of the drain electrode region and located in the second well region, abd a grid structure located on the substrate between the drain electrode region and the source electrode region. A gap is reserved between the first well region and the second well region and is of an inconsecutive structure. According to the horizontal diffusing semiconductor device, the gap is reserved between the first well region and the second well region, so that the two regions are not consecutive. Thus, the drain and source breakdown voltage of the device is improved, performances of the device are further boosted, an extra mask layer is not added in the device and cost will not be improved.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular, the invention relates to a laterally diffused semiconductor device. Background technique [0002] Lateral Diffusion Metal Oxide Semiconductor (LDMOS) plays an important role in the design and manufacture of integrated circuits. For example, lateral diffusion metal oxide semiconductor transistors (HV LDMOS) are widely used in the drive of thin film transistor liquid crystal displays. in the chip. Generally speaking, LDMOS transistors need to have a higher source-drain breakdown voltage (Breakdown Voltage between Drain and Source, BVDS) and a lower on-resistance in order to improve device performance. [0003] LDMOS in the prior art such as figure 1 As shown, the device includes a substrate (not shown in the figure), on which at least two P wells 10 and an N well 11 located between the two P wells 10 are formed, and the P wells and Two gate structures 12 are formed above the N well 1...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/0684H01L29/7816
Inventor 邓永平
Owner SEMICON MFG INT (SHANGHAI) CORP
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