Periodically degrades the inner and outer diameters from the disk to improve read response time

[0019] In the following description, reference is made to the drawings constituting a part of the description and the drawings illustrating a plurality of embodiments. It should be understood that other embodiments can be utilized, and structural and operational changes can be made.

[0020] Degradation and read response time requirements based on spatial locality

[0021] Intelligent Cache Write (IWC) is a hybrid of two other cache management mechanisms called CLOCK and CSCAN. CLOCK is based on a least recently used (LRU) mechanism, which degrades tracks based on which tracks are LRU or least recently used. In order to emulate (emulate) the CLOCK property, IWC maintains the time bit of each track. This time bit is set when the host writes the track. The time position is reset when the degraded scan encounters a track with the set time position. If the downgrade scan finds the step size of a track that does not have a set time position, the downgrade scan can select the step size for downgrade. CSCAN degrades orbit based on spatial location. In order to simulate the nature of CSCAN, IWC uses a balanced tree to maintain a sorted list of tracks. The degraded scan to find the track to be degraded may traverse the balance tree in order from the lowest to the highest track position.

[0022] Some applications, such as mission-critical applications, real-time applications, or certain applications in the medical field, may have strict requirements on read response time. Such applications can be called applications with strict reading requirements. For example, in some applications, the average read response time must be less than 15 milliseconds, 99.99% of reads must be completed in less than 600 milliseconds, 99.9% of reads must be completed in less than 200 milliseconds, and 99% of reads must Completed in less than 60 milliseconds. For example, in every 10,000 reads, each of at least 9900 reads must be completed in less than 60 milliseconds, each of at least 9990 reads must be completed in less than 200 milliseconds, and at least 9999 reads Each of these must be completed in less than 600 milliseconds, where the average time for each reading should be less than 15 milliseconds. In other words, no more than one read out of 10,000 reads can take 600 milliseconds or more, no more than 10 reads out of 10,000 can take 200 milliseconds or more, and no more than 10,000 reads. More than 100 reads can take 60 milliseconds or more.

[0023] In some cases, by using IWC, the degradation is performed in a spatial order, and the read performance may be impaired. When the IWC is degraded according to the sorting order of the data location, there may be device reading across all devices. Disk drives can ignore this reading in order to avoid a long-term search to serve reading away from the head. There may be a CAL (Command Aging Limit) timer with an exemplary default value of 500 milliseconds. When the CAL timer expires, the disk drive is forced to service read requests that have not reached a duration greater than the default value of the CAL timer. Strict read requirements applications can find that the read service time of 500 milliseconds is too high for them.

[0024] In some embodiments, an enhanced IWC cache management mechanism is applied. In the enhanced IWC cache management mechanism, downgrading is performed by traversing an ordered list of track classification spaces. However, while performing a downgrade from the sorted space ordered list of tracks, the enhanced IWC cache management mechanism often performs one downgrade at the ID (inner diameter) and/or one downgrade at the OD (outer diameter) of the disk drive. This forces the disk drive to service commands away from the current position of the head. As a result, it can serve the reading far away from the degraded position, thereby satisfying the reading requirements of applications with strict reading requirements.

[0025] figure 1 Illustrated is a block diagram of a computing environment 100 including a storage controller 102 coupled to a plurality of hosts 104a, 104b, ..., 104n and a plurality of storage devices 106 according to certain embodiments. In contrast to the cache 108 included in the storage controller 102, the plurality of storage devices 106 may be referred to as auxiliary storage devices.

[0026] The storage controller 102 and the host 104a...104n may include any suitable computing devices, including those currently known in the art, such as personal computers, workstations, servers, host computers, handheld computers, palmtop computers, telephone services, Network equipment, blade computers, servers, etc. The storage controller 102, the hosts 104a...104n, and the plurality of storage devices 106 can communicate through a network, such as the Internet, a storage area network, a wide area network, a local area network, and the like.

[0027] The plurality of storage devices 106 may include any suitable storage devices known in the art, such as physical hard disks, solid state disks, and the like. The storage device 106 is configured as a volume. In some embodiments, the storage device 106 may be a disk configured as a redundant array of independent disks (RAID) level. in figure 1 In, a plurality of RAID levels 110a...110m are shown.

[0028] The cache 108 may include one or more of different types of memory, such as RAM, write cache, read cache, NVS, and so on. Different types of memories including caches can interoperate with each other. Writes from the hosts 104a...104n may be written to the cache 108 initially, and later downgraded to the storage device 106. If the corresponding information is available in the cache 108, the read request from the host 104a...104n can be satisfied from the cache 108, otherwise the information is upgraded from the storage device 106 to the cache 108, and then provided to the host 104a... 104n.

[0029] The storage controller 102 executes a downgraded application 114 which is also referred to as an enhanced smart write cache application. The enhanced smart write cache application 114 maintains a classification binary tree of tracks 116 arranged in the spatial order of their occurrence on the disc. The enhanced smart write cache application 114 also maintains a cursor 118 to the classification binary tree 116, where the cursor 118 shows the position of the track to be degraded while traversing the classification binary tree 116.

[0030] The downgrade application 114 further maintains an inner diameter (ID) outer diameter (OD) timer 120, also referred to as a timer or IDOD timer. The timer 120 can be initially set to a predetermined duration, such as 10 milliseconds. The downgrade application 114 also maintains a counter 122 called a downgrade counter or IDOD downgrade counter.

[0031] In some embodiments, the enhanced smart write cache application 114 traverses the classification binary tree 116 of the track to perform the downgrade so that the set of read requirements standard 124 for certain exemplary applications is met (e.g., as shown in the exemplary host 104a The strict reading requirements apply 126).

[0032] In some embodiments, a strict read request application 126 with a read response time requirement 124 may send a command from the host 104a to the storage controller 102. The command may include a read or write request or some other command. By traversing the classified binary tree 116 of the track, the enhanced smart write cache application 114 processes the command to at least meet the criteria indicated by the set of read requirement criteria 124.

[0033] figure 2 The figure shows a block diagram 200 illustrating exemplary requirements for a read response time 202 for an exemplary strict read requirement application 126 in accordance with certain embodiments.

[0034] In some embodiments, exemplary requirements for read response time may be as follows:

[0035] 1) The average read response time will be less than 15.0 milliseconds (shown via reference numeral 204);

[0036] 2) Four nine requirements: 99.99% of reads will be completed within 600 milliseconds (shown by reference numeral 206);

[0037] 3) Three nine requirements: 99.9% of reads will be completed within 200 milliseconds (shown via reference numeral 208); and

[0038] 4) Two nine requirements: 99% of reads will be completed within 60 milliseconds (indicated by reference numeral 210).

[0039] In some embodiments, if the waiting time for reading is greater than 500 milliseconds, reading is performed even if there is no pending write. The 500 millisecond time is the command aging limit (CAL) time. In such an embodiment, four nines requirements can be easily met, but three nines and two nines requirements may be difficult to meet, unless the track indicated in the classification binary tree 116 is degraded while being far away from the disk drive head Pending reads of locations provide some additional priority over pending degradation (ie, writes from cache to disk).

[0040] image 3 The figure shows a flowchart 300 illustrating a first operation for performing periodic downgrading from the inner and outer diameters of the disc while traversing the data structure 116 storing tracks in sorted spatial order, according to some embodiments. image 3 The operations shown in may be performed by the enhanced smart write cache application 114 implemented in the storage controller 102.

[0041] Control starts at block 302 where the timer 120 (eg, IDOD timer) is set to a predetermined time interval (eg, 10 milliseconds), and then control proceeds to where the downgrade counter 122 (eg, IDOD downgrade counter) is set Zeroed box 304.

[0042] Control proceeds to block 306 where the enhanced smart write cache application 114 begins to traverse the classification binary tree 116 of the track (ie, scan). The enhanced smart write cache application 114 determines (at block 308) whether the track at the cursor position has been picked while traversing the classification binary tree 116. If so, then a determination is made (at block 310) as to whether the timer 120 has expired (ie, the predetermined time interval has exceeded). If the timer 120 has expired, then a determination is made (at block 312) as to whether the downgrade counter 122 is zero.

[0043] If at box 312, it is determined that the downgrade counter 122 is zero (the "yes" branch from box 312), then without changing the cursor position, find the first track at the beginning of the classification binary tree (in box 314) and demote it instead of the track at the cursor position (at block 316). As a result, the next set of downgrades will start at the cursor position again. The downgrade counter 122 is incremented (at block 318) to one. Control returns to block 306, and the enhanced smart write cache application 114 continues to pick up tracks to perform the downgrade from the cursor.

[0044] If at box 312, it is determined that the downgrade counter 122 is not zero (the "No" branch from box 312), then without changing the cursor position, find the last track at the end of the classification binary tree (at box 320 ) And demote it instead of the track at the cursor position (at block 322). As a result, the next set of downgrades will start from the cursor position again. The downgrade counter 122 is set (at block 324) to zero, and the timer 120 is set (at block 326) to a predetermined time interval. Control returns to block 306, and the enhanced smart write cache application 114 continues to pick up tracks to perform the downgrade from the cursor. When the "No" branch is followed, control also returns from blocks 308 and 310 to block 306.

[0045] therefore, Figure 4 The figure shows certain implementations that improve the response time to reads by using the timer 120 and the downgrade counter 122, the enhanced smart write cache application 114, and by periodically traversing the classification binary tree 116 of spatially sorted tracks. This is achieved by moving the magnetic head for degrading from the inner diameter and/or outer diameter of the disk. The increase in read response time is at least sufficient to satisfy the set of read requirement standards 124. If the read response time is not sufficient to meet the read requirement standard set 124, the timer 120 can be set to a lower predetermined value, and the downgrade from the inner diameter and outer diameter can be performed in a smaller time interval. In some embodiments, a workload simulation may be performed to determine what predetermined value of the timer 120 is sufficient to meet the read response time provided by the read requirement standard 124.

[0046] It should be noted that in some embodiments, the first track at the beginning of the classification binary tree may correspond to the track at the inner diameter of the disc or some track close to the inner diameter of the disc, and the last track at the end of the classification binary tree may correspond to The track at the outer diameter of the disc or some track close to the outer diameter of the disc. In an alternative embodiment, the first track at the beginning of the classification binary tree may correspond to the track at the outer diameter of the disc or some track close to the outer diameter of the disc, and the last track at the end of the classification binary tree may correspond to the track at the end of the disc. The track at the inner diameter or some track close to the inner diameter of the disk. In the classification binary tree, the tracks existing in the inner diameter and outer diameter of the disc are spatially ordered. In an alternative embodiment, data structures other than the classification binary tree may represent the ordering of tracks.

[0047] Figure 4 The figure shows a flowchart 400 showing a second operation for performing periodic downgrade from the inner diameter and/or outer diameter of the disc while traversing a data structure in which tracks are stored in sorted space order, according to some embodiments. Figure 4 The operations shown in may be performed by the enhanced smart write cache application 114 implemented in the storage controller 102.

[0048] Control begins at block 402 where the storage controller 102, including the cache 108, receives a command from the host 104a, where the set of criteria 124 corresponding to the read response time for executing the command must be met. Perform a downgrade application 114 (at block 440) that downgrades an orbit based at least on the recency of use and the spatial position of the track, wherein the spatial ordering of the orbit is maintained in the data structure 116, and the downgrade application 114 traverses Orbital spatial ordering. In some embodiments, the degraded application 114 is an enhanced smart write cache application.

[0049] Control proceeds to block 406, in which while traversing the spatial ordering of the tracks, the tracks are degraded at periodic intervals from at least the inner diameter and/or outer diameter of the disc, where the set of criteria corresponding to the read response time for executing the command is satisfied 124. In some embodiments, by degrading the tracks from the inner diameter and/or outer diameter of the disc at periodic intervals, the read tracks that are relatively far from the current position of the head are served by violating the spatial ordering.

[0050] therefore, Figure 1-4 The figure shows certain embodiments of a smart write cache application in which the enhanced smart write cache application 114 is enhanced as a hybrid of CLOCK and CSCAN degradation mechanisms. By violating the current track to be degraded from the spatial classification list, the enhanced smart write cache application periodically degrades the track from the inner diameter and/or outer diameter of the disc while traversing the spatial classification list of the track used for degrading . As a result, the reading can be performed with a faster response time compared to a periodic degradation at a predetermined time interval in which the inner diameter and/or the outer diameter of the disc is not performed.

[0051] Standard programming and/or engineering techniques may be used to implement the operations as methods, devices, or computer program products to generate software, firmware, hardware, or any combination thereof. Correspondingly, various aspects of the implementation can take the form of an all-hardware implementation, an all-software implementation (including firmware, resident software, microcode, etc.), or an implementation that combines software and hardware aspects. The hardware aspects are described herein. In general, it can be called "circuit", "module" or "system". In addition, in some embodiments, aspects of the embodiments may also be implemented in the form of a computer program product in one or more computer-readable media, and the computer-readable medium contains computer-readable program code.

[0052] Any combination of one or more computer readable media can be utilized. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), Erasable programmable read only memory (EPROM or flash memory), optical fiber, portable compact disk read only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above. In this document, the computer-readable storage medium can be any tangible medium that contains or stores a program, and the program can be used by or in combination with an instruction execution system, device, or device.

[0053] A computer-readable signal medium may include a propagated data signal having computer-readable program code embodied therein (e.g., in baseband or as part of a carrier wave). Such propagated signals can take any of a variety of forms, including but not limited to electromagnetic, optical, or any suitable combination thereof. The computer-readable signal medium may also be any computer-readable medium other than the computer-readable storage medium. The computer-readable medium may send, propagate, or transmit the program for use by or in combination with the instruction execution system, apparatus, or device .

[0054] The program code contained on the computer-readable medium can be transmitted by any suitable medium, including, but not limited to, wireless, wired, optical cable, RF, etc., or any suitable combination of the above.

[0055] The computer program code used to perform the operations of the present invention can be written in any combination of one or more programming languages. The programming languages ​​include object-oriented programming languages-such as Java, Smalltalk, C++, etc., as well as conventional Procedural programming language-such as "C" language or similar programming language. The program code can be executed entirely on the user's computer, partly on the user's computer, executed as an independent software package, partly on the user's computer and partly executed on a remote computer, or entirely executed on the remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any kind of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (for example, using an Internet service provider to Connect via the Internet).

[0056] Hereinafter, various aspects of the present invention will be described with reference to flowcharts and/or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present invention. It will be understood that each block of the flowchart and/or block diagram and the combination of blocks in the flowchart and/or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to the processors of general-purpose computers, special-purpose computers, or other programmable data processing devices, thereby producing a machine that makes these computer program instructions when executed by the processors of the computer or other programmable data processing devices , A device that implements the functions/actions specified in one or more blocks in the flowchart and/or block diagram is produced.

[0057] It is also possible to store these computer program instructions in a computer-readable medium. These instructions make computers, other programmable data processing devices, or other devices work in a specific manner, so that the instructions stored in the computer-readable medium generate An article of manufacture that implements instructions for the functions/actions specified in one or more blocks in the flowcharts and/or block diagrams.

[0058] It is also possible to load computer program instructions on a computer, other programmable data processing device, or other equipment, so that a series of operation steps are executed on the computer, other programmable data processing device, or other equipment to produce a computer-implemented process, thereby The instructions executed on a computer or other programmable device can provide a process for realizing the functions/operations specified in the blocks in the flowcharts and/or block diagrams.

[0059] Figure 5 The figure shows a block diagram showing certain elements that may be included in the storage controller 102 or the hosts 104a...104n according to certain embodiments. The system 500 may include a storage controller 102 or hosts 104a...104n, and may include a circuit 502, which may include at least a processor 504 in some embodiments. The system 500 may also include a memory 506 (eg, a volatile storage device) and a storage 508. The storage 508 may include non-volatile storage devices (for example, EEPROM, ROM, PROM, RAM, DRAM, SRAM, flash memory, firmware, programmable logic, etc.), disk drives, optical disk drives, tape drives, and the like. The storage 508 may include internal storage devices, attached storage devices, and/or network-accessible storage devices. The system 500 may include program logic 510 that includes code 512 that can be loaded into the memory 506 and executed by the processor 504 or the circuit 502. In some embodiments, the program logic 510 including the code 512 may be stored in the storage 508. In certain other embodiments, program logic 510 may be implemented in circuit 502. So although Figure 5 The program logic 510 is shown separately from other elements, but the program logic 510 may be implemented in the memory 506 and/or the circuit 502.

[0060] Certain embodiments may be directed to methods for deploying computing instructions into a computing system by integrating computer readable code by human or automated processing, wherein the code combined with the computing system is enabled to perform the operations of the embodiments.

[0061] Unless clearly indicated otherwise, the terms "one embodiment", "an embodiment", "a plurality of embodiments", "the embodiment", "one or more embodiments", "certain embodiments" and "an embodiment" Mode" means "one or more (but not all) embodiments of the present invention".

[0062] Unless expressly specified otherwise, the terms "including", "including", "having" and variations thereof mean "including but not limited to".

[0063] The enumerated list of items does not imply that any or all items are mutually exclusive, unless explicitly stated otherwise.

[0064] The terms "a", "an" and "the" mean "one or more" unless expressly stated otherwise.

[0065] Unless explicitly stated otherwise, devices that communicate with each other do not need to communicate with each other continuously. In addition, devices that communicate with each other can communicate directly or indirectly through one or more intermediaries.

[0066] The description of an embodiment with multiple components in communication with each other is not meant to require all such components. Rather, the various optional components are described to illustrate the wide variety of possible implementations of the invention.

[0067] In addition, although process steps, method steps, algorithms, etc. may be described in a sequential order, such processes, methods, and algorithms may be configured to work in an alternative order. In other words, any sequence or order of steps that can be described does not necessarily indicate a requirement to perform the steps in that order. The process steps described herein can be performed in any actual order. In addition, certain steps can be performed simultaneously.

[0068] When describing a single device/item (regardless of whether it is cooperative or not) in this document, it will be readily apparent that more than one device or item can be used instead of a single device/item. Likewise, where more than one device or item (regardless of cooperation or not) is described herein, it will be obvious that a single device/item can be used instead of more than one device or item, or a different number of devices/items can be used instead. Not the number of devices or programs shown. One or more other devices may alternatively be used to embody the functions and/or features of the device, which are not explicitly described as having such functions/features. Therefore, other embodiments of the present invention need not include the device itself.

[0069] At least some operations that may have been exemplified in the figures show certain events that occur in a certain order. In alternative embodiments, certain operations may be performed, modified, or removed in a different order. Furthermore, steps can be added to the above logic and it still conforms to the described implementation. In addition, the operations described herein may occur sequentially, or certain operations may be performed in parallel. Furthermore, operations may be performed by a single processing unit or by distributed processing units.

[0070] The foregoing description of the various embodiments of the present invention is presented for purposes of illustration and description. In view of the above teachings, many modifications and changes are possible.

[0071] __________________________________________________________

[0072] *Java is a trademark or registered trademark of Oracle and/or its affiliates.