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Design method for control transmission lines on same layer and with different impedance

An impedance control and design method technology, applied in the field of electronics, can solve the problems affecting the signal integrity of the 100-ohm transmission line, the difficulty of impedance control, and the difficulty of impedance design, so as to achieve the effect of optimizing integrity, ensuring impedance continuity, and optimizing design.

Inactive Publication Date: 2014-08-06
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Take the 85 ohms and 100 ohms that are very common in the design of computer motherboards as an example.
Conventional impedance design, if the impedance of the 85 ohm transmission line is guaranteed to be controllable, and the line width design is optimal, the line width of the 100 ohm transmission line will be narrower, and the narrower line width, as the signal rate increases, the current concentrates on the surface of the conductor. causing conductor loss problems
Such impedances are distributed on the same level, and the impedance design becomes more difficult.
If the impedance design of 85 ohms is guaranteed, it will inevitably affect the signal integrity of the 100 ohm transmission line

Method used

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  • Design method for control transmission lines on same layer and with different impedance
  • Design method for control transmission lines on same layer and with different impedance
  • Design method for control transmission lines on same layer and with different impedance

Examples

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Embodiment 1

[0013] attached figure 1 It is a schematic diagram of the laminated structure of the computing main board in this embodiment, as shown in the attached figure 1 As shown, in the computing motherboard of the server, Plane4 (L4) is the GND layer, Plane5 (L5) is the SIGNAL layer, Plane6 (L6) is the GND layer, and Plane7 (L7) is the POWER, SIGNAL, and GND layers; among them, 85 ohm , 100 ohm impedance line is located on the Signal5 layer, and the upper and lower reference layers are Plane4 and Plane6 respectively; figure 2 As shown, in this embodiment, the 85 ohm impedance line is designed to have a trace width of 5.5Mil, a trace separation of 8Mil, and a transmission line thickness of 1.3Mil, and the distance H1 between Signal5 and Plane4 is 7 Mil, the distance H2 between Signal5 and Plane6 is 5.5 Mil, this design ensures that the 85 ohm transmission line impedance is controllable, and the line width design is optimal;

[0014] However, this design will result in a narrower lin...

Embodiment 2

[0016] In a blade server, there is an 85-ohm PCIE3.0 bus and a 14Gbps transmission rate 14Gbps impedance-controlled FDR bus in a blade server. Ohm transmission lines, of which there are many 85-ohm buses, and only 16 pairs of differential lines for 100-ohm buses. In this embodiment, the 85 ohm transmission line is designed to have a line width of 6Mil and a line spacing of 8Mil, and the 100 ohm transmission line is designed to have a line width of 6.5Mil and a line spacing of 9Mil; at the same time, in order to ensure the impedance design of 100 ohms, this embodiment uses a 100 ohm transmission line The lower reference plane is hollowed out, so that the 100 ohm transmission line refers to the second layer plane below, the length of H2 (the distance between Plane3 and Plane4) is increased, and the impedance is increased to meet the 100 ohm design without reducing the line width.

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Abstract

The invention discloses a design method for control transmission lines on the same layer and with different impedance. According to different Plane layers arranged on the control transmission lines with different impedance on a calculation mainboard of a server together, different design is performed on the line width and the line distance of the control transmission lines, and optimization design is performed on the high-impedance transmission lines on the premise that optimality of the low-impedance transmission lines is guaranteed; according to the optimization design, a reference plane below the high-impedance transmission lines is hollowed, so that the high-impedance transmission lines refer to a second plane below the high-impedance transmission lines, and the distance between the high-impedance transmission lines and the reference plane is increased. By means of the design method of the transmission lines, the requirement of impedance is met to guarantee impedance continuity of signals, loss of conductors is reduced, and signal integrity is optimized.

Description

technical field [0001] The invention relates to the field of electronics, in particular to a design method of transmission lines with different impedance control in the same layer. Background technique [0002] As the transmission speed of the signal is getting faster and faster, PCIE3.0 is up to 8Gpbs, and the FDR bus is up to 14Gbps, and it will develop to 25Gbps in the future. The position of signal integrity in effective signal transmission is becoming more and more important. In channel interconnection design, the control of transmission line loss is the key point of design. The transmission line loss includes two parts, conductor loss and dielectric loss. The dielectric loss is related to the plate, while the conductor loss is related to the width and thickness of the transmission line section. A wide and thick wire cross-section is better than a thin and narrow conductor cross-section, which is beneficial to reduce the influence of skin effect on conductor loss. Hi...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 王素华
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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