A method and system for updating ldpc code check node

Abstract

The invention discloses an LDPC code check node updating method. The method includes the steps that check node data are input into a state register, and when check node data are equal to a status bit, the value of the status bit is set to be 1; the status bits with a value of 1 are looked for in the state register, and the minimum values in the check node data are obtained; when the number of the minimum values is larger than 1, all values are updated to be the minimum value, and looking for the minimum values is stopped; when the number of the minimum values is equal to 1, the minimum values continue to be looked for; the status bits whose extreme low positions are 1 in the state register are shielded; the status bits whose second low positions are 1 are looked for, and the second minimum values in the check node data are obtained. The invention further discloses an updating system used for LDPC code check nodes on the basis of an FPGA. The system comprises a data storage module, a shielding module and a gating module. According to the technical scheme, the minimum values can be output in only one cycle through a state register, the comparison cycle is not limited by check node degrees, on-chip resources are little consumed, operation space is effectively saved and the operating speed is improved.

Description

technical field [0001] The invention relates to a digital communication updating method. More specifically, it relates to a method and system for updating check nodes of LDPC codes. Background technique [0002] As a channel coding method with excellent performance, LDPC code has been widely used in various communication standards. The LDPC code decoder with high speed and low power consumption is a core technology in practical application. There are many decoding algorithms for LDPC codes, which can be divided into two categories: hard decision and soft decision. Among them, although the hard decision algorithm is simple to implement, its performance is not ideal, so it is rarely used in practice. In the soft-decision decoding algorithm, two factors of decoding complexity and performance are considered comprehensively, and the minimum sum algorithm is an algorithm commonly used in hardware implementation. It only has addition operations when updating variable nodes, and ...

AI Technical Summary

Problems solved by technology

[0004] The technical problem to be solved by the present invention is to provide a method and system for updating LDPC code check nodes, so as to overcome the problems of resource waste, large power consumption and high cost in the prior art

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