Method for solving side wall deposition problem of germanium-silicon selective epitaxy through nitrogen implanting

Abstract

The invention provides a method for solving the side wall deposition problem of a germanium-silicon selective epitaxy through nitrogen implanting. The method comprises the steps that a silicon slice is formed in a substrate, wherein the silicon slice is provided with an NMOS device region and a PMOS device region, the NMOS device region and the PMOS device region are isolated by an isolation area, and gate structures with silicon nitride side walls are formed in the NMOS device region and the PMOS device region respectively; a photoetching mask is arranged on the NMOS device region of the substrate, and the PMOS device region is exposed; side wall surface pretreatment is conducted on the silicon nitride side walls of the PMOS device region exposed out of the photoetching mask through the nitrogen implanting process and the annealing process; etching is conducted on the PMOS device region after side wall surface pretreatment so that a source drain region groove can be formed; the source drain region groove formed through etching is filled through selective epitaxy growth so that a germanium-silicon source drain region can be formed. Low-energy nitrogen implanting and high-temperature annealing are used before etching, side wall surface pretreatment is conducted, as a result, silicon broken bonds can be consumed, the deposition speed of germanium-silicon layers of the side walls is reduced, and deposition selectivity is enhanced.

Description

Technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to the sidewall deposition problem during the selective growth of a silicon germanium layer in the source and drain regions of PMOS; more specifically, the present invention relates to a sidewall deposition for improving the selective epitaxy of silicon germanium by nitrogen implantation Methods of accumulating problems. Background technique [0002] As the feature size of silicon-based devices has decreased, integration and complexity have increased, a series of new issues involving materials, device physics, device structure, and process technology have emerged. In order to continue to maintain the rapid development of silicon-based microelectronics, a new process of introducing strain in the channel of MOS devices has emerged. Introducing strain in the active region through a process is called process-induced strain. [0003] The performance of CMOS circuits is large...

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Problems solved by technology

[0005] However, broken bonds of silicon tend to remain on the surface of the sidewall, and these broken bonds accelerate the initial growth rate of the silicon germanium layer on the sidewall, and after selective deposition, excess germanium will be left on the sidewall of the PMOS device region 200 Silicon layer 300 (such as figure 2 shown), affecting the subsequent process

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