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A Method for Improving Sidewall Deposition of SiGe Selective Epitaxy by Using Nitrogen Implantation

A nitrogen injection and selective technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of affecting the process, easily remaining silicon, and accelerating the initial growth rate of the silicon germanium layer, so as to reduce the initial growth rate , Inhibit the effect of silicon germanium layer deposition

Active Publication Date: 2017-01-18
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

[0005] However, broken bonds of silicon tend to remain on the surface of the sidewall, and these broken bonds accelerate the initial growth rate of the silicon germanium layer on the sidewall, and after selective deposition, excess germanium will be left on the sidewall of the PMOS device region 200 Silicon layer 300 (such as figure 2 shown), affecting the subsequent process

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  • A Method for Improving Sidewall Deposition of SiGe Selective Epitaxy by Using Nitrogen Implantation
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  • A Method for Improving Sidewall Deposition of SiGe Selective Epitaxy by Using Nitrogen Implantation

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[0023] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.

[0024] The principle of the present invention is to perform nitrogen implantation and high-temperature annealing surface pretreatment on the silicon nitride sidewall of the PMOS, consume redundant silicon broken bonds on the sidewall surface, thereby reducing the initial growth rate of selective germanium silicon epitaxy on the sidewall, Suppresses silicon germanium layer deposition on sidewalls.

[0025] Preferred embodiments of the present invention will be specifically described below.

[0026] Figure 3 to Figure 7 It schematically shows various steps of the method for improving the sidewall deposition problem of germanium-silicon selective epitaxy by using nitrogen implantation according to a preferred embodiment of the present invention. ...

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Abstract

The invention provides a method for solving the side wall deposition problem of a germanium-silicon selective epitaxy through nitrogen implanting. The method comprises the steps that a silicon slice is formed in a substrate, wherein the silicon slice is provided with an NMOS device region and a PMOS device region, the NMOS device region and the PMOS device region are isolated by an isolation area, and gate structures with silicon nitride side walls are formed in the NMOS device region and the PMOS device region respectively; a photoetching mask is arranged on the NMOS device region of the substrate, and the PMOS device region is exposed; side wall surface pretreatment is conducted on the silicon nitride side walls of the PMOS device region exposed out of the photoetching mask through the nitrogen implanting process and the annealing process; etching is conducted on the PMOS device region after side wall surface pretreatment so that a source drain region groove can be formed; the source drain region groove formed through etching is filled through selective epitaxy growth so that a germanium-silicon source drain region can be formed. Low-energy nitrogen implanting and high-temperature annealing are used before etching, side wall surface pretreatment is conducted, as a result, silicon broken bonds can be consumed, the deposition speed of germanium-silicon layers of the side walls is reduced, and deposition selectivity is enhanced.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to the problem of sidewall deposition during the selective growth of germanium-silicon layers in PMOS source and drain regions; more specifically, the present invention relates to a method of using nitrogen implantation to improve the sidewall deposition of germanium-silicon selective epitaxy method of accumulating problems. Background technique [0002] With the reduction of feature size, integration and complexity of silicon-based devices, a series of new problems involving materials, device physics, device structure and process technology have emerged. In order to continue to maintain the rapid development of silicon-based microelectronics, a new process of introducing strain in the channel of MOS devices has emerged. The strain introduced into the active region by the process is called process-induced strain. [0003] The performance of CMOS circuits is large...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/8238
CPCH01L21/28008H01L21/823814H01L21/823864H01L29/66636H01L29/7848
Inventor 邱裕明
Owner SHANGHAI HUALI MICROELECTRONICS CORP