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Nanoscale three-state resistive random access memory and preparation method thereof

A three-state resistance and memory technology, applied in electrical components and other directions, can solve the problems of short holding time and poor switching performance of multi-resistance resistive devices, and achieve the effect of significant switching effect, good performance, and concentrated resistance cumulative probability distribution.

Active Publication Date: 2014-08-20
HEBEI UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] One of the purposes of the present invention is to provide a nanoscale three-state resistive variable memory to solve the problems of short retention time and poor switching performance of existing multi-resistance resistive variable devices

Method used

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  • Nanoscale three-state resistive random access memory and preparation method thereof
  • Nanoscale three-state resistive random access memory and preparation method thereof
  • Nanoscale three-state resistive random access memory and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] Example 1: Preparation of a three-state resistive memory with Ag / nc-Si:H / Pt structure

[0037] 1. In Pt / Ti / SiO 2 Deposition of nc-Si:H film on / Si substrate:

[0038] 1. Selection and processing of substrate materials: choose Pt / Ti / SiO 2 / Si as the substrate, first place it in acetone and ultrasonically clean it for 10 minutes, then put it in alcohol and clean it ultrasonically for 10 minutes, then take it out with a plastic clip and put it in deionized water and clean it ultrasonically for 5 minutes, then take it out and clean it with nitrogen (N 2 ) and blow dry.

[0039] 2. Put in the substrate and vacuumize: open the chamber of the PECVD equipment (radio frequency plasma enhanced chemical vapor deposition system), and put the cleaned substrate (ie Pt / Ti / SiO 2 / Si substrate) placed on the substrate table of the PECVD equipment cavity and fixed, then close the cavity, set the plate spacing to 2cm according to the conventional operation requirements, then turn on th...

Embodiment 2

[0047] Embodiment 2: the Raman spectrogram of the nc-Si:H thin film prepared in embodiment 1

[0048] Detect the Raman spectrogram of the nc-Si:H film of the memory element (i.e. the three-state resistive memory of Ag / nc-Si:H / Pt structure) prepared in Example 1 for analysis, the results are as follows Figure 5 shown. Figure 5 , the peak is located near 500cm-1, by Figure 5 It can be calculated that the crystallization rate of nc-Si:H film is 42.4%.

Embodiment 3

[0049] Example 3: High Resolution Transmission Electron Microscopy (HRTEM) image of the nc-Si:H thin film prepared in Example 1

[0050] Use high-resolution transmission electron microscopy (HRTEM) to scan the high-resolution transmission electron microscope (HRTEM) figure of the nc-Si:H film of the memory element prepared in Example 1, and the results are as follows Image 6 shown. Depend on Image 6 It can be seen that in the uniform amorphous network, there are small grains around the amorphous matrix, and the grains gather together in the amorphous matrix to form spherical nanoparticles.

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Abstract

The invention discloses a nanoscale three-state resistive random access memory. According to the nanoscale three-state resistive random access memory, an nc-Si:H film and an Ag electrode film are sequentially deposited on a Pt film layer of a Pt / Ti / SiO2 / Si substrate. The invention meanwhile discloses a preparation method of the nanoscale three-state resistive random access memory. The method specifically includes the steps of growing the nc-Si:H film on the Pt / Ti / SiO2 / Si substrate through a PECVD method, and growing an Ag electrode on the nc-Si:H film through a magnetron sputtering method. The nanoscale three-state resistive random access memory has long keeping time and good switching performance, and three resistance states keep stable for 2.3*105 seconds; the switching resistance value ratio of a high-resistance-state resistor to a middle-resistance-state resistor is larger than 102, the switching resistance value ratio of a middle-resistance-state resistor and a low-resistance-state resistor is larger than 105, and the obvious switching effect is achieved.

Description

technical field [0001] The invention relates to a multi-state resistive memory device and a preparation process thereof, in particular to a nanoscale three-state resistive memory device and a preparation method thereof. Background technique [0002] With the continuous reduction of device feature size and continuous improvement of integration, the traditional non-volatile FLASH memory based on charge storage can no longer meet the needs of the market. Researchers have carried out a lot of research work in the field of new storage technology and achieved great results Big progress, such as ferroelectric memory, phase change memory, magnetic memory, resistive change memory, etc. Among these new types of memory, resistive variable memory has become a strong competitor of the next generation of non-volatile memory due to its simple device structure, excellent scalability, fast read and write speed, and low power consumption. Widespread attention in the electronics industry. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00
Inventor 闫小兵陈英方郝华娄建忠
Owner HEBEI UNIVERSITY
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