An encryption chip security performance testing method and device

Abstract

The present invention is applicable to the field of testing, and provides a method and device for testing the security performance of an encryption chip. The method includes: determining the attacked parameters of the error injection attack in the encryption algorithm according to the encryption algorithm of the encryption chip; Sensitive registers related to the calculation of the attacked parameters in the chip are inserted into the scan chain; the attacked chip is made to work in a test mode, and the security of the encrypted chip is determined by scanning output results of the attacked parameters. In the embodiment of the present invention, since the scan chain is inserted into the sensitive register related to the attacked parameter, the change of the attacked parameter can be obtained, so as to more intuitively judge whether an effective error occurs, and effectively improve the testing efficiency of the encryption chip security.

Description

technical field [0001] The invention belongs to the field of testing, in particular to a method and device for testing the security performance of an encryption chip. Background technique [0002] With the development of communication technology, information security is becoming more and more important. Although there are complex encryption and decryption algorithms and key protection mechanisms in the chip, the chip is still vulnerable to induced error attacks, resulting in the leakage of data content in the chip. [0003] In order to avoid data leakage when the chip is attacked by induced errors, such as the leakage of the private key, it is necessary to test the security and stability of the encryption circuit in the security chip. Among them, the fault injection attack is a widely used security performance testing method used to evaluate the fault tolerance of encryption chips and the impact of faults on encryption chips. [0004] The principle of the error injection a...

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Problems solved by technology

[0006] The purpose of the embodiments of the present invention is to provide a method for testing the security performance of an encryption chip, so as to solve the problem that in the testing process of an encryption chip in the prior art, internal changes caused by injected errors cannot be reflected in the output results, and the encryption and decryption are only based on the output. As a result, it is difficult to analyze and judge the mechanism of error generation, which leads to the problem of low test efficiency of existing encryption chips

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