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Method for monitoring gate oxide layer surface of patterned wafer

A gate oxide layer and wafer technology, which is applied in the field of monitoring the surface of the gate oxide layer of a pattern wafer, can solve the problems that the quality change of the gate oxide layer cannot be completely monitored, and the surface microscopic properties of the pattern wafer cannot be monitored.

Active Publication Date: 2017-06-27
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Claims
  • Application Information

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Problems solved by technology

Due to the limitations of traditional detection methods, the microscopic properties of the surface of the graphic chip cannot be monitored, and the quality change of the gate oxide layer cannot be completely monitored. Therefore, it is urgent for those skilled in the art to provide a method for monitoring the surface of the gate oxide layer of the graphic wafer. A technical problem solved

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  • Method for monitoring gate oxide layer surface of patterned wafer
  • Method for monitoring gate oxide layer surface of patterned wafer
  • Method for monitoring gate oxide layer surface of patterned wafer

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Embodiment Construction

[0029] The method for monitoring the gate oxide layer surface of a pattern wafer of the present invention will be described in more detail below in conjunction with schematic diagrams, wherein a preferred embodiment of the present invention is represented, and it should be understood that those skilled in the art can modify the present invention described here, while still The advantageous effects of the present invention are realized. Therefore, the following description should be understood as the broad knowledge of those skilled in the art, but not as a limitation of the present invention.

[0030] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to ach...

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Abstract

The method for monitoring the surface of the gate oxide layer of a pattern wafer of the present invention includes: providing a semiconductor substrate on which a gate oxide layer is formed; detecting surface information of a plurality of lattice points on the gate oxide layer , obtaining the distribution, average value and standard deviation of the surface information; and judging whether the growth process of the gate oxide layer is stable according to the average value and standard deviation of the surface information. The surface information is work function and / or surface potential. The method for monitoring the surface of the gate oxide layer of a graphic wafer in the present invention uses an electrical detection method to detect the work function and surface potential of the gate oxide layer surface, and the detected surface information can be used for daily monitoring of the gate oxide layer, or Patterned wafers for express screening of gate oxide with excellent quality make up for the shortcomings of traditional inspection methods.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for monitoring the surface of the gate oxide layer of a pattern wafer. Background technique [0002] With the rapid development of Very Large Scale Integration (VLSI) and Ultra Large Scale Integration (ULSI), the size of MOS devices has been continuously reduced. In order to increase the response speed of the device, increase the driving current and the capacity of the storage capacitor, the thickness of the gate oxide layer in the device is continuously reduced. However, two subsequent problems have become important factors hindering the further development of integrated circuits: breakdown and leakage. [0003] While the size of the device is proportionally reduced, the working voltage is not proportionally reduced accordingly, so that the electric field strength in the thin gate oxide layer increases, and the breakdown voltage of the device decreases; on the o...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/26
Inventor 肖天金邱裕明康俊龙
Owner SHANGHAI HUALI MICROELECTRONICS CORP