Unlock instant, AI-driven research and patent intelligence for your innovation.

Forming method of mask layer, forming method and detection method of interconnection structure

A detection method and mask layer technology, applied in the field of semiconductors, can solve problems such as poor electrical connection performance, achieve the effects of improving connection performance, avoiding defects, and improving accuracy

Active Publication Date: 2017-12-01
SEMICON MFG INT (SHANGHAI) CORP
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, the electrical connection performance of the interconnection structure formed by the prior art is poor

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Forming method of mask layer, forming method and detection method of interconnection structure
  • Forming method of mask layer, forming method and detection method of interconnection structure
  • Forming method of mask layer, forming method and detection method of interconnection structure

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0039] Please refer to figure 2 , a substrate 100 is provided, and a low temperature oxide layer 101 is formed on the surface of the substrate 100 .

[0040] The base 100 is a semiconductor substrate, and semiconductor devices (not shown in the figure) are formed in the semiconductor substrate. The base 100 may also be a dielectric material layer formed on a substrate (not shown), and interconnection structures such as plugs are formed in the dielectric material layer.

[0041]The low temperature oxide layer 101 is formed by using a plasma chemical vapor deposition process, SiH 4 and N 2 O is used as a reaction gas at a temperature of 150°C to 300°C, the material of the low temperature oxide layer 101 is silicon oxide, and the thickness of the low temperature oxide layer 101 is

[0042] The surface of the low-temperature oxide layer 101 is relatively rough, and the density is low, and it has high anti-reflection performance, and the hardness of the low-temperature oxide ...

no. 2 example

[0071] The present invention also provides an interconnection structure formed by using the above mask layer as a mask.

[0072] Please refer to Figure 8 , provide a substrate 200, the surface of the substrate has a dielectric layer 210, and the dielectric layer 210 includes an etching stopper layer 201 on the surface of the substrate 200 and an insulating layer 202 on the surface of the etching stopper layer 201.

[0073] The substrate 200 is a semiconductor substrate, and semiconductor devices (not shown in the figure) are formed in the semiconductor substrate. The substrate 200 may also be a dielectric material layer formed on a substrate (not shown), and interconnection structures such as plugs are formed in the dielectric material layer.

[0074] The dielectric layer 210 is used as an interlayer dielectric layer, and an interconnection structure is subsequently formed in the dielectric layer 210 . The dielectric layer 210 includes an etch stop layer 201 and an insulati...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Provided is a mask layer formation method, an interconnection structure formation method and a detection method. The mask layer formation method comprises the steps that a substrate is provided; a low-temperature oxide layer is formed on the surface of the substrate, and the surface of the low-temperature oxide layer is rough and reaction gas forming the low-temperature oxide layer is adsorbed on the surface of the low-temperature oxide layer; the low-temperature oxide layer is processed and reaction gas is removed; and a photoresist layer is formed on the surface of the low-temperature oxide layer. According to the mask layer formation method, accuracy of mask patterns can be enhanced, and connection performance of an interconnection structure which is formed by adopting a mask layer to act as a mask can be enhanced.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a mask layer, a method for forming an interconnection structure and a detection method. Background technique [0002] With the continuous improvement of the integration of components in integrated circuits, the size of components is continuously reduced, which also puts forward higher requirements for interconnection technology. The industry usually adopts dual damascene structure to realize metal interconnection. A via hole and a trench are sequentially formed in the dielectric layer, and an interconnection metal is formed in the via hole and the trench. In the process of forming the dual damascene structure, the through hole needs to be filled firstly after the through hole is etched so as to perform trench photolithography. [0003] Please refer to figure 1 , is a schematic diagram of the mask layer formed in the existing process of forming the d...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/033H01L21/3105H01L21/768H01L21/66G01N21/956
CPCH01L21/0338H01L21/76816H01L21/76898H01L22/12
Inventor 张京晶陈昵
Owner SEMICON MFG INT (SHANGHAI) CORP