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Manufacture method of through-silicon via

A manufacturing method and TSV technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem that integrated circuits cannot meet the manufacturing needs of TSV

Inactive Publication Date: 2014-10-29
IPENVAL CONSULTANT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Due to this size difference, it is not difficult to imagine that the manufacturing methods designed to make traditional integrated circuits may not be able to meet the manufacturing needs of TSVs

Method used

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  • Manufacture method of through-silicon via
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  • Manufacture method of through-silicon via

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Embodiment Construction

[0006] The preferred embodiments of the present invention will be described in detail below. For example, all components, component sub-parts, structures, materials, configurations, etc. described herein can be arbitrarily matched into new embodiments without following the order of description or the embodiments to which they belong. , these embodiments should belong to the category of the present invention. After reading the present invention, those who are familiar with this technology should be able to make some changes and modifications to the above-mentioned components, sub-components, structures, materials, configurations, etc. without departing from the spirit and scope of the present invention. The scope of patent protection of the invention shall be defined by the appended claims of the present claims, and these changes and modifications shall fall within the claims of the present invention.

[0007] There are many embodiments and illustrations of the present inventio...

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Abstract

The invention relates to a manufacture method of a through-silicon via. The method comprises the following steps: providing a substrate; forming a through hole in the substrate, the through hole having a diameter which is at least 1 mum and a depth which is at least 5 mum; carrying out first chemical vapor deposition processing by utilizing first etching / deposition so as to form a dielectric layer on the bottom portion and the side wall of the through hole and the upper surface of the substrate; and carrying out shape correction processing by utilizing second etching / deposition so as to change the contour of the dielectric layer; and repeating the first chemical vapor deposition processing and the shape correction processing at least once until the thickness of the dielectric layer reaches a predetermined value.

Description

technical field [0001] The invention relates to a method for manufacturing through-silicon holes. Background technique [0002] In order to save valuable layout space or increase the efficiency of interconnection, multiple integrated circuit (IC) chips can be stacked together to form an IC package structure. To achieve this, a three-dimensional (3D) stack packaging technique may be used to package multiple integrated circuit chips together. This three-dimensional (3D) stack packaging technology is widely used in through-silicon vias (TSVs). Through-silicon via (TSV) is a vertical conductive via that can completely penetrate a silicon wafer, silicon plate, substrate or chip made of any material. Nowadays, 3D integrated circuits (3DICs) are widely used in many fields such as memory stacks, image sensor chips, and so on. [0003] Whether a single transistor or a single interconnect, TSVs are a hundred times larger or larger. Due to this size difference, it is not difficult ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
CPCH01L21/76898
Inventor 黄昭元何岳风杨名声陈辉煌
Owner IPENVAL CONSULTANT
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