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A non-volatile memory read circuit based on dynamic reference

A reading circuit, non-volatile technology, applied in the field of non-volatile memory, can solve the problem of reduced reading judgment margin

Active Publication Date: 2017-12-26
致真存储(北京)科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Aiming at the problem that the non-volatile memory reading judgment margin is reduced due to parameter deviations mentioned in the above background, the present invention proposes a non-volatile memory reading circuit based on dynamic reference, which overcomes the deficiencies of the prior art and solves the problem of The problem of parameter deviation in non-volatile memory is used to improve the read judgment margin of non-volatile memory, thereby improving its reliability

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  • A non-volatile memory read circuit based on dynamic reference
  • A non-volatile memory read circuit based on dynamic reference
  • A non-volatile memory read circuit based on dynamic reference

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Embodiment Construction

[0049] Referring to the accompanying drawings, the substantive features of a method for reading non-volatile memory based on dynamic reference in the present invention will be further described. Detailed exemplary embodiments are disclosed herein, specific structural and functional details thereof are merely representative for purposes of describing exemplary embodiments, therefore, the invention may be embodied in many alternative forms and should not be construed To be limited only to the exemplary embodiments set forth herein, all changes, equivalents, and alternatives falling within the scope of the invention should be covered. Additionally, well-known elements, devices and subcircuits of the invention will not be described in detail or will be omitted so as not to obscure the relevant details of the embodiments of the invention.

[0050] figure 1 It is a schematic diagram of the structure of the storage unit of the non-volatile memory 1R1T. The non-volatile memory 1R1T ...

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Abstract

A non-volatile memory reading circuit based on dynamic reference, which is composed of load circuits PR0 and PR1, a dynamic reference unit, NMOS clamp transistors NC0 and NC1, a bit line selection switch MUX and a voltage comparison amplifier VC; the NMOS clamp transistor The source is connected to the non-volatile memory data unit to be read and the dynamic reference unit through the bit line selection switch MUX, the gate of the NMOS clamp transistor is controlled by the VG_clamp signal, and its drain is connected to the drain of the load transistor, and the source of the load transistor Connected to the voltage source Vdd, the gate is controlled by the VG_load signal, the data unit and the dynamic reference unit branch read the voltage at the source of the load transistor, and connect to the two input terminals of the voltage comparison amplifier, and Vdata is also connected to the two dynamic reference unit gate of a transistor that controls the resistance of the dynamic reference cell. The invention solves the parameter deviation problem of the non-volatile memory, improves the reading judgment margin, and thus improves its reliability.

Description

technical field [0001] The invention relates to a non-volatile memory reading circuit based on a dynamic reference, which is used for improving the reading reliability of the non-volatile memory and belongs to the technical field of the non-volatile memory. Background technique [0002] In recent years, new non-volatile memory technologies, such as Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM), Resistive Random Access Memory (RRAM), and Phase Change Random Access Memory (Phase Change Random AccessMemory, PCRAM) and so on have been continuously developed, and have gradually entered the stage of actual production and application. The basic storage principle of these non-volatile memory technologies is to change the resistance state of its memory cells so that they can be in the high resistance state R H and low resistance state R L To switch between, so as to use this property to store data information, such as R H Corresponding data bit "1", R L Correspond...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/26
Inventor 康旺郭玮李政赵巍胜张有光
Owner 致真存储(北京)科技有限公司
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