Manufacturing method of semiconductor package

Abstract

A manufacturing method of a semiconductor packaging piece comprises the steps of: forming a first adhesive layer on a first carrying plate; arranging a semiconductor chip to the first adhesive layer, wherein the semiconductor chip is provided with a plurality of electrode pads; forming a packaging colloid on the first adhesive layer, wherein the packaging colloid is used for covering the semiconductor chip and is provided with a first surface and a second surface which are opposite to each other, and the first surface faces the first adhesive layer; performing a singulation step on the packaging colloid so as to form a groove penetrating through the packaging colloid; arranging a second carrying plate on the second surface of the packaging colloid through a second adhesive layer; removing the first carrying plate and the first adhesive layer; filling an adhesive material into the groove; forming a circuit storey-addition structure electrically connected to the electrode pads on the first surface of the packaging colloid and the adhesive material; and removing the second carrying plate and the second adhesive layer. The manufacturing method of the semiconductor packaging piece solves the problem of shifting of the semiconductor chip in the prior art.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor package, in particular to a method for making a semiconductor package that prevents the semiconductor chip from deviating from the original predetermined position during the process. Background technique [0002] With the vigorous development of the electronic industry, electronic products are also gradually moving towards the trend of multi-function and high performance. In order to meet the packaging requirements of miniaturization of semiconductor packages, the technology of wafer level packaging (Wafer Level Packaging, WLP) has been developed. [0003] Figure 1A to Figure 1F What is shown is a cross-sectional view of a conventional manufacturing method of a wafer-level semiconductor package. [0004] Such as Figure 1A As shown, first, a carrier board 10 is provided. [0005] Such as Figure 1B As shown, then, a thermal release tape 11 is formed on the carrier board 10 . [0...

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Problems solved by technology

[0010] However, in the above-mentioned manufacturing method of the existing semiconductor package, the heat-peelable tape is flexible, and it will expand when heated in the molding process, causing the semiconductor chip on it to deviate from the original predetermined position; in addition, the encapsulant is injected into the package In the mold used, the lateral thrust generated by the flow of the encapsulant makes it easier to deviate the semiconductor chip adhered to the thermal release adhesive layer

Once the semiconductor chip is shifted, it will be difficult to align the subsequent circuit layers with the electrode pads of the semiconductor chip, which will cause problems such as low yield and poor product reliability.

[0011] Moreover, since the thermal expansion coefficient of the encapsulant is different from that of the carrier board, after heating to harden the encapsulant, the overall structure will be warped (warpage), making it difficult to carry out subsequent processes.

[0012] In addition, because the existing manufacturing method must use heat release tape, it cannot effectively reduce the manufacturing cost

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