A fractional frequency divider

Abstract

The invention provides a fractional frequency divider which comprises a controller, a phase interpolater, a buffer and an integer frequency divider. The controller generates control signals. The phase interpolater is controlled by the controller to achieve frequency division of a fractional part. The buffer is used for shaping signals output by the phase interrpolater, and the integer frequency divider is connected to the buffer and achieves frequency division of an integer part. The fractional frequency divider can be used in a digital phase-locked loop system and also can be used in a simulation phase-locked loop system, a digital phase-locked loop system difficult to deign based on a TDC is avoided, and the design of a full digital phase-locked loop system is greatly simplified. Quantizing noise generated by a delta-sigma modulator is avoided, the quantizing noise of the system is greatly improved, and the system performance is optimized. Meanwhile, extra circuit compensation is of no need in the design process of the phase interpolater, and therefore the design is simple. The logic of the controller is simple and can be achieved through a Verilog code, and the reusability is good.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a fractional frequency divider. Background technique [0002] In the field of wireless radio frequency communication, a phase locked loop (Phase Lock Loop, PLL) is an essential part of a wireless transceiver chip. The phase-locked loop can keep the frequency and phase of the controlled oscillator synchronized with the input reference signal, which is called phase-locked, or phase-locked for short. It is a feedback control system with phase error as the control object. It compares the phase between the reference signal and the output signal of the controlled oscillator, and generates a phase error voltage to adjust the phase of the output signal of the controlled oscillator. The controlled oscillator output frequency is consistent with the reference signal frequency. In the case that the two frequencies are the same but the phases are not exactly the same, the phase difference...

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Problems solved by technology

[0006] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a fractional frequency divider for solving the problems of complex phase-locked loop design, high power consumption, low precision, high noise, and poor compatibility in the prior art.

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