Method and device for reading data

Abstract

The embodiment of the invention discloses a data reading method and data reading equipment, which relate to the field of computers and are capable of reducing operation complexity and power consumption during the sequential reading of mass data. The concrete scheme is that the data reading method comprises the following steps: sending the row address, in a memory, of data which needs to be read to the memory by an MC (memory controller) so as to enable the memory to conveniently store data in the corresponding row of the row address in the memory into a buffer zone of the memory; sending a first command to the memory by the MC so as to enable the memory to conveniently traverse all column addresses according to the first command to send the data which need to be read to the MC, wherein the data which need to be read are all the data which are stored in the buffer zone and are in the corresponding row of the row address, and the first command is used for activating a direct memory in the memory to access a DMA (direct memory access) logic; receiving the data which need to be read and are sent by the memory by the MC. The data reading method and data reading equipment disclosed by the invention are used in a data reading process.

Description

technical field [0001] The invention relates to the field of computers, in particular to a data reading method and device. Background technique [0002] As we all know, a computer system generally consists of five parts: processor, memory, input device, output device, and bus. The memory is used to store the data and instructions required for the processor to run. Dynamic Random Access Memory (DRAM) It is the mainstream implementation of memory in computer systems at present. [0003] The reading of data in DRAM is generally realized by adding rows and columns. Specifically, when the memory controller (Memory Controller, MC) receives the data access instruction sent by the central processing unit (Center Processing Unit, CPU) , first analyze the data access instruction to obtain the row address and column address of the data to be accessed in the DRAM, and then send the row address to the DRAM, so that the DRAM stores the data corresponding to the row address in the row buf...

AI Technical Summary

Problems solved by technology

[0005] There are at least the following problems in the prior art: as we all know, the size of a row of data in DRAM is generally 4KB-64KB, and in the specification of DDR3SDRAM, from the perspective of MC, data is read with a maximum data bit width of 8 times That is to say, the maximum read data size at one time is 512bit, and the granularity is larger than the traditional 64bit or 128bit, but it is still far smaller than the size of a row of data in DRAM. If you want to read a row of data in DRAM cached in the entire row buffer , you still need to issue the burst read command multiple times, that is to say, there will still be problems such as complex operation and high power consumption

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