A single bus receive logic structure

Abstract

The invention discloses a monobus reception logic structure which comprises an edge triggering module, a clock generation module and a reset module, wherein the edge triggering module is respectively connected with the reset module and the clock generation module; the reset module is connected with the clock generation module; the edge triggering module is connected with a monobus signal input end and used for recognizing a digital string starting edge and enabling the clock generation module to start timing; the clock generation module is connected with a system clock and used for clock timing and outputting a preset chip selection clock signal, a preset digit clock signal and a preset frame reset signal according to a preset pulse width and a preset frame digit. The monobus reception logic structure has the technical effects that the function can be realized by a hardware programmable device, few resources are consumed by the hardware, the time delay is small, the processing speed is high, the real-time property is strong, software halt does not happen during pure-hardware execution, the reception bit rate is not influenced by the period of MCU machines and the reception of high-speed code rate can be realized.

Description

technical field [0001] The invention relates to the electronic field, in particular to a single-bus receiving logic structure. technical background [0002] The traditional method of receiving single-bus signals based on MCU software programming and sampling needs to consume CPU resources. The speed of receiving bit rates is limited by the operating clock cycle of the CPU, and the execution effect depends entirely on the performance of the CPU. However, simple digital logic circuits do not have ready-made mature general-purpose logic chips or circuits that can solve the problem of automatically receiving high-speed data code string data. Contents of the invention [0003] Aiming at the deficiencies of the prior art, the technical solution to be solved by the present invention is to provide a kind of technical solution, which can be realized by hardware programmable devices, which consumes less hardware resources, has small time delay, fast processing speed, strong real-tim...

AI Technical Summary

Problems solved by technology

[0002] The traditional method of receiving single-bus signals based on MCU software programming and sampling needs to consume CPU resources. The speed of receiving bit rates is limited by the operating clock cycle of the CPU, and the execution effect depends entirely on the performance of the CPU.

However, simple digital logic circuits do not have ready-made mature general-purpose logic chips or circuits that can solve the problem of automatically receiving high-speed data code string data.

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