A sampling time error correction method for a multi-channel parallel adc system

A technology of sampling time and error correction, applied in the direction of analog/digital conversion calibration/testing, which can solve problems such as limiting the application range of input signal bandwidth, and achieve the effect of reducing design difficulty and eliminating aliasing problems

Active Publication Date: 2018-01-16
DATANG MICROELECTRONICS TECH CO LTD
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this cannot avoid the problem of aliasing, which greatly limits the bandwidth of the input signal and the scope of application

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A sampling time error correction method for a multi-channel parallel adc system
  • A sampling time error correction method for a multi-channel parallel adc system
  • A sampling time error correction method for a multi-channel parallel adc system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] The present invention is based on the frequency domain relationship between the output signal of the multi-channel parallel ADC system and the analog input signal, based on the switch circuit and the analog low-pass filter, and proposes a method to correct the multi-channel by eliminating the system error signal in the output signal Methods for Sampling Time Error in Parallel ADC Systems. Since the solution of the systematic error needs to know the value of the sampling time error, the whole correction method mainly includes two parts: the estimation of the sampling time error and the solution of the systematic error.

[0026] Such as figure 1 As shown, the analog input signal x(t) is divided into two paths through the switch circuit. When the switch circuit is connected to paths 1 and 3, paths 1 and 3 are connected, at this time, the analog input signal x(t) is filtered through an analog low-pass filter to obtain an analog signal d(t), and the analog signal d(t ) to ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a sampling time error correction method for a multi-channel parallel analog-to-digital converter (ADC) system, comprising the following steps: connecting the output end of an analog low-pass filter to the input end of a multi-channel parallel ADC system through a switch circuit, The analog input signal x(t) enters the analog low-pass filter to obtain a narrow-band analog signal d(t), and the multi-channel parallel ADC system samples d(t) to obtain a multi-channel sampling output signal yd(n). For yd( n) Perform LMS-frequency domain adaptive estimation to obtain sampling time error γ(n); through the switch circuit, the analog input signal x(t) is directly sent to the multi-channel parallel ADC system, and the sampling output signal y(n), y is obtained by sampling (n) After being processed by the digital differentiator and γ(n) through the first multiplier, the system error signal c(n), y(n) and c(n) are passed through the subtractor to obtain the corrected output signal yc( n). The sampling time error correction method disclosed by the invention solves the problem of aliasing and the difficulty of realizing high-speed hardware circuits on the basis of completing the error correction.

Description

technical field [0001] The invention relates to the field of high-speed and high-precision analog-to-digital conversion, in particular to a sampling time error correction method for a multi-channel parallel ADC system. Background technique [0002] Analog-to-digital converter (ADC), as the interface between analog technology and digital technology, is widely used in modern electronic systems. With the development of digital signal processing technology, digital circuits have higher and higher requirements on the sampling rate of analog-to-digital converters. The most important performance parameters of an ADC are conversion accuracy and conversion speed. Limited by the current level of ADC chip development, it is difficult for a single ADC to have high speed and high precision at the same time. The speed and precision of ADC are mutually restricted. With the increase of ADC conversion speed, its precision tends to decline. The constraint between the two has become the main...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/10
Inventor 齐佩佩高洪福
Owner DATANG MICROELECTRONICS TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap