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Self-adhesive die

A bare chip and chip technology, applied in the field of cost-effective packaging, can solve problems such as high temperature and unbearable microelectronic chips

Active Publication Date: 2015-03-25
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, microelectronic chips cannot withstand such high temperatures

Method used

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Examples

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Embodiment Construction

[0016] The present invention is described with reference to the accompanying drawings. The figures are not drawn to scale and are provided merely to illustrate the invention. Several aspects of the invention are described below with reference to example applications for illustration. It should be understood that numerous specific details, relationships, and methods are set forth to provide an understanding of the invention. One skilled in the relevant art will readily recognize, however, that the invention may be practiced without one or more of the specific details or with other methods. In other instances, well-known structures or operations have not been shown in detail to avoid obscuring the invention. The disclosure is not limited to the illustrated order of acts or events, as some acts may occur in different orders and / or concurrently with other acts or events. Moreover, not all illustrated acts or events are required to implement a methodology in accordance with the ...

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PUM

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Abstract

A method and apparatus for enhancing the thermal performance of semiconductor packages effectively. The concept of this invention is to provide silicon nanowires on the backside of an integrated circuit die to directly attach the die to the substrate, thereby improving the interface between die and substrate, and thus enhancing thermal performance and enhancing reliability by improving adhesion.

Description

technical field [0001] The inventions described herein generally relate to semiconductor device packaging and associated die attach methods. In particular, the present invention relates to a cost-effective packaging method that provides high thermal performance at the die-to-leadframe interface when implemented in a molded package. The principles herein are also applicable to other semiconductor packages and devices. Background technique [0002] The present invention relates generally to the packaging of integrated circuits (ICs). More particularly, a new die attach method suitable for use in packaging IC dies is described to eliminate die attach material and reduce cost, while providing good thermal performance without concern for resin bleed. [0003] There are several conventional processes for packaging integrated circuit (IC) die. For example, many IC packages utilize metal lead frames. A lead frame typically includes a plurality of leads or contacts, and optionall...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/13
CPCH01L23/49513H01L24/27H01L24/29H01L24/32H01L24/83H01L29/0657H01L2224/29139H01L2224/29144H01L2224/29193H01L2224/32225H01L2224/32245H01L2224/83385H01L2224/83894H01L2224/94H01L2224/27318H01L2224/29169B82Y10/00B82Y40/00H01L29/0676H01L2924/12042H01L2224/27H01L2924/00H01L2924/00014H01L23/49503H01L24/70H01L2924/01014H01L2924/14H01L2924/2064H01L2924/207H01L2924/2075
Inventor 张荣伟
Owner TEXAS INSTR INC