A Design Method of Analog Decoder for Linear Block Codes Based on Probability Calculation

A technology of linear block code and analog decoder, applied in the field of analog decoder design

Inactive Publication Date: 2017-07-14
BEIJING INSTITUTE OF TECHNOLOGYGY
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Problems solved by technology

[0006] The purpose of the present invention is to solve the problems of traditional digital decoders in terms of power consumption, speed, heat dissipation, etc., and aiming at the existing analog decoding circuit, it proposes a structure optimal simulation of one-to-one correspondence between circuit devices and factor graph models How to build a decoder

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  • A Design Method of Analog Decoder for Linear Block Codes Based on Probability Calculation
  • A Design Method of Analog Decoder for Linear Block Codes Based on Probability Calculation
  • A Design Method of Analog Decoder for Linear Block Codes Based on Probability Calculation

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Embodiment Construction

[0065] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in combination with specific implementation examples and with reference to the accompanying drawings.

[0066] Take (6,3) linear block code as an example to illustrate the structure of this analog decoder. The check matrix of the selected code pattern is as follows: (this code word contains 6 bits, the first 3 bits are information bits, and the last 3 bits are check bits)

[0067]

[0068] According to this H matrix, its corresponding analog decoder is built, and the method steps are as follows:

[0069] In step 1, the corresponding factor graph is obtained from the corresponding relationship between the H matrix of the linear block code and the factor graph.

[0070] This check matrix is ​​a 3×6 matrix with 3 rows and 6 columns, corresponding to 3 check nodes and 6 variable nodes in the factor graph. The w...

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Abstract

The invention relates to a method for designing an analog decoder of a linear block code based on probability calculation, which belongs to the technical field of signal processing and comprises the following steps: (1) Obtaining its factor from the corresponding relationship between the H matrix and the factor graph of the linear block code Figure; (2) Realize the corresponding functions of the nodes in the factor graph through two kinds of gate circuits, the equivalent gate and the probability XOR gate; (3) Realize the probability gate circuit module of any degree through the probability gate circuit with degree 3; (4) Realization of special nodes; (5) According to the connection relationship between variable nodes and check nodes in the factor graph, connect the corresponding equivalent gates introduced in steps 2 to 4 with probability XOR gates to realize the analog decoder Structure. Compared with the existing design method, the method of the present invention corresponds the devices (two kinds of gate circuits) of the analog decoder with the factor graph model one by one, the design process is clear and the construction is quick, and the analog decoder built by the method of the present invention can be expanded Good performance and wide applicability.

Description

technical field [0001] The invention relates to a design method of an analog decoder, in particular to a design method of a linear block code based on probability calculation, and belongs to the technical field of communication signal processing. Background technique [0002] In digital communication systems, in order to ensure the reliability of transmitted information, channel coding technology is usually used, and linear block codes have been widely used in modern digital communication systems due to their simple structure and superior performance. Low Density Parity Check Code (LDPC, Low Density Parity Check Code) is a kind of linear block code with a sparse parity check matrix proposed by Dr. Robert G. Gallager in 1963. Because of its performance that can approach the Shannon limit, so It has become the most widely used class of linear block codes. [0003] Belief propagation (referred to as BP algorithm) is a message passing algorithm based on a graph model. This algo...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/11
Inventor 郑浩赵哲丁旭辉高原安建平卜祥元尹雪
Owner BEIJING INSTITUTE OF TECHNOLOGYGY
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