Continuously approach temporary simulation digital converter and its control method

Abstract

The present invention relates to a continuous approximation temporary storage type analog-digital converter and a control method thereof, and provides a continuous approximation temporary storage type analog-digital converter, wherein the high-level capacitance of the continuous approximation temporary storage type analog-digital converter is composed of multiple secondary capacitors , and these sub-capacitors can be calibrated when the continuous-approximation temporary analog-to-digital converter is operating, so it will not affect the operating speed; in addition, since all the sub-capacitors are smaller than the continuous-approximation temporary analog-to-digital converter The redundant capacitor itself, so there is no need to limit the swing of the input signal, that is, the input signal is allowed to be input with full swing.

Description

technical field [0001] The present invention relates to a successive approximation register analog-to-digital converter (Successive Approximation Register Analog-to-Digital Converter, SAR ADC), in particular to a successive approximation register analog-to-digital converter capable of background calibration and its control methods. Background technique [0002] In the continuous approximation temporary analog-to-digital converter, the capacitance value of each bit capacitor in the bit capacitor array may deviate from the originally designed capacitor due to process errors, ambient temperature changes, or incomplete symmetry / matching. value, resulting in errors in the digital output, which in turn affects the linearity of the continuous approximation temporary register analog-to-digital converter. In order to solve this problem, it is usually necessary to calibrate the bit capacitance. However, some current calibration methods have some problems, such as affecting the workin...

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Problems solved by technology

[0002] In the continuous approximation temporary analog-to-digital converter, the capacitance value of each bit capacitor in the bit capacitor array may deviate from the originally designed capacitor due to process errors, ambient temperature changes, or incomplete symmetry / matching. value, resulting in an error in the digital output, which in turn affects the linearity of the continuous approximation register analog-to-digital converter

In order to solve this problem, it is usually necessary to calibrate the bit capacitance. However, some current calibration methods have some problems, such as affecting the working speed of the continuous approximation temporary analog-to-digital converter, or needing to limit the swing of the input signal to Avoid exceeding the coding range of the analog-to-digital converter, etc., thus causing confusion for the designer and flaws in the operation

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