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Method for forming MOSFET structure

A technology of gas composition and photoresist layer, applied in semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve problems such as gate metal layer leakage and operation failure

Active Publication Date: 2015-08-12
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Thus, leakage of the gate metal layer may be caused, and operation failure may occur due to the leakage

Method used

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  • Method for forming MOSFET structure
  • Method for forming MOSFET structure
  • Method for forming MOSFET structure

Examples

Experimental program
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Effect test

Embodiment Construction

[0027] Figure 1 to Figure 5 A cross-sectional view of FinFET structure 100 during formation of FinFET structure 100 is shown.

[0028] exist figure 1 In, the FinFET structure 100 initially includes a first photoresist layer 110, a second photoresist layer 120, an interlayer dielectric (ILD) layer 130, a bottom photoresist layer 140, a gate layer 160, a substrate layer 150, an overlay layer 170 and epitaxial layer 180 . The source / drain portion of FinFET structure 100 includes capping layer 170 and epitaxial layer 180 . The first photoresist layer 110, the second photoresist layer 120, and the bottom photoresist layer 140 may be formed using a three-layer photoresist technique, where the first photoresist may be formed from a mixture of photoresist materials and silicon Layer 110, second photoresist layer 120 may be formed from a photoresist material, and bottom photoresist layer 140 may be formed from a polymer. The term "bottom" in the bottom photoresist layer 140 repres...

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PUM

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Abstract

A method of forming a MOSFET structure is provided. In the method, an epitaxial layer is formed. A cap layer is formed above the epitaxial layer. A first trench is formed above the epitaxial layer. A protection layer is deposited within the first trench. The protection layer is a material selected from the group consisting of germanium and silicon-germanium.

Description

technical field [0001] The present invention relates to semiconductor technology and, more particularly, to methods of forming MOSFET structures. Background technique [0002] During the formation of the FinFET structure, several etch processes may damage the source / drain portions including capping and epitaxial layers. If the source / drain portions are damaged, the silicon fins of the FinFET structure may be in direct contact with the epitaxial silicon defining layer of the fin structure after the gate metal layer is formed within the FinFET structure. Thus, leakage of the gate metal layer may be caused, and operation failure may occur due to the leakage. Contents of the invention [0003] In order to solve the problems in the prior art, the present invention provides a method for forming a MOSFET structure, comprising: forming an epitaxial layer; forming a cover layer on the epitaxial layer; forming a first trench on the epitaxial layer and depositing a protection layer...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/78H01L29/06
CPCH01L21/02664H01L23/564H01L21/306H01L29/0847H01L29/66795H01L29/785H01L21/31144H01L2924/0002H01L2924/00H01L29/161H01L29/165H01L29/66545H01L29/7848H01L29/7851
Inventor 傅劲逢严佑展柯志欣李俊鸿林焕哲张惠政
Owner TAIWAN SEMICON MFG CO LTD