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Decoding method, memory storage device and memory control circuit unit

A technology of control circuit and decoding method, applied in the field of decoding, can solve problems such as the decline of correction ability

Active Publication Date: 2015-08-19
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, if the program does not support soft bit mode decoding, the correction ability will be reduced

Method used

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  • Decoding method, memory storage device and memory control circuit unit
  • Decoding method, memory storage device and memory control circuit unit
  • Decoding method, memory storage device and memory control circuit unit

Examples

Experimental program
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Embodiment Construction

[0132] [First Exemplary Embodiment]

[0133] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0134] figure 1 It is a schematic diagram of a host system and a memory storage device according to an exemplary embodiment. figure 2 It is a schematic diagram of a computer, an input / output device and a memory storage device according to an exemplary embodiment.

[0135] Please refer to figure 1 , the host system 1000 generally includes a computer 1100 and an input / output (input / output, I / O) device 1106 . The computer 1100 includes a microprocessor 1102 , a random access memory (random access memory, RAM) 1104 , a system bus 1108 and a data transmission interface 1110 . The input / output device 1106 ...

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Abstract

The invention provides a decoding method, a memory storage device and a memory control circuit unit. The decoding method comprises the following steps: sending a first reading instruction sequence for indicating that a storage package is read according to first reading voltage to obtain a plurality of first verification bits; according to the first verification bits, executing a parity checking program to obtain a plurality of syndromes; according to the syndromes, determining second reading voltage different from the first reading voltage; sending a second reading instruction sequence for indicating that the storage package is read according to the second reading voltage to obtain a plurality of second verification bits; and according to the second verification bits, executing a decoding program. Therefore, the correction capability of decoding can be improved.

Description

technical field [0001] The present invention relates to a decoding method, and in particular to a decoding method of a rewritable non-volatile memory module, a memory storage device and a memory control circuit unit. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable to be built in the above-mentioned various programmable memory modules. in portable multimedia devices. [0003] Generally, data written to the rewritable non-volatile memory module is encoded according to an error correction code. The data read from the rewritable non-volatile memory module also undergoes a corresponding decoding procedure. In some cases, if the read data has erroneous ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/08G11C8/10
Inventor 曾建富
Owner PHISON ELECTRONICS