Array substrate, method for manufacturing array substrate, and display device

Abstract

The present invention provides a method for manufacturing an array substrate, which is characterized in that the method for manufacturing the array substrate includes: forming a first metal layer on the substrate, and making the first metal layer form a pattern including a gate through a patterning process; Forming a gate insulating layer on the substrate and the first metal layer, forming an oxide semiconductor layer projected onto the gate on the gate insulating layer; disposing a photoresist layer on the oxide semiconductor layer, On both sides of the channel region on the oxide semiconductor layer are the first oxide semiconductor layer and the second oxide semiconductor layer; for the first oxide semiconductor layer and the second oxide semiconductor layer provided with a photoresist layer The layer is subjected to plasma treatment to remove the photoresist layer; an etching stopper layer is formed on the substrate; a source electrode and a drain electrode are formed on the substrate, wherein the source electrode is in contact with the first oxide conductor layer, and the The drain is in contact with the second oxide conductor layer.

Description

technical field [0001] The present invention relates to the field of manufacturing array substrates, in particular to an array substrate, a method for manufacturing the array substrate and a display device. Background technique [0002] The currently widely used oxide array substrate uses oxide semiconductor as the active layer, which has the characteristics of high mobility, high on-state current, better switching characteristics, and better uniformity, and can be applied to applications that require fast response and large current , such as high-frequency, high-resolution, large-size displays, and organic light-emitting displays. In the prior art, the array substrate includes gate lines and gate electrodes, semiconductor layers, source and drain electrodes, etch barrier layers, insulating layers, and pixel electrodes. The second metal layer must have a certain overlapping width with the etch barrier layer when forming the source and drain electrodes, so as to ensure that ...

AI Technical Summary

Problems solved by technology

In the prior art, the array substrate includes gate lines and gate electrodes, semiconductor layers, source and drain electrodes, etch barrier layers, insulating layers, and pixel electrodes. The second metal layer must have a certain overlapping width with the etch barrier layer when forming the source and drain electrodes, so as to ensure that the second metal layer can completely cover the semiconductor layer when the manufacturing process deviates, so that the length of the channel formed by the semiconductor layer is relatively large. Poor conductivity, resulting in a decrease in pixel aperture ratio

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