Unlock instant, AI-driven research and patent intelligence for your innovation.

A vertical bidirectional voltage-resistant power semiconductor transistor and its preparation method

A technology for power semiconductors and transistors, applied in the field of power semiconductor devices, can solve the problems of large on-resistance, increase the area of ​​lithium battery chips, and affect the use of lithium battery chips, reduce the electric field strength, and improve the reverse voltage withstand performance. , Improve the effect of reverse withstand voltage

Active Publication Date: 2017-11-28
SOUTHEAST UNIV
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, two MOSFET tubes with a common drain and antiparallel connection to form a bidirectional switch will lead to a large on-resistance of the bidirectional switch, which increases the area of ​​the lithium battery chip and affects the use of the lithium battery chip in portable electronic devices.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A vertical bidirectional voltage-resistant power semiconductor transistor and its preparation method
  • A vertical bidirectional voltage-resistant power semiconductor transistor and its preparation method
  • A vertical bidirectional voltage-resistant power semiconductor transistor and its preparation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0047] Combine below figure 2 , To explain the present invention in detail, a vertical bidirectional withstand voltage power semiconductor transistor is characterized by comprising: an N-type drain 1, an N-type epitaxial layer 2 is provided on the N-type drain 1, and an N-type epitaxial layer 2 A first P-type body region 4 is provided above, an N-type buffer layer 5 is provided above the first P-type body region 4, and a heavily doped N-type source 7 is provided above the N-type buffer layer 5. The surface of the N-type source 7 is connected to the source metal layer 8, and stepped trenches are provided in the N-type epitaxial layer 2, the first P-type body region 4, the N-type buffer layer 5 and the heavily doped N-type source 7 The stepped groove is composed of a first part and a second part, the second part of the stepped groove is located above the first part of the stepped groove, and the second part of the stepped groove is wider than the first part of the stepped groove....

Embodiment 2

[0049] Combine below Figure 9 ~ Figure 16 To explain the present invention in detail, a method for preparing a vertical bidirectional voltage-resistant power semiconductor transistor includes:

[0050] The first step: first select an N-type silicon material as the substrate and epitaxially grow an N-type epitaxial layer 2;

[0051] Step 2: Next, a vertical metal oxide semiconductor field effect transistor is fabricated, and a trench is first etched on the N-type epitaxial layer 2 with a mask;

[0052] Step 3: Next, grow a gate oxide layer 3 on the trench surface, deposit polysilicon, and then etch the upper part of the polysilicon to form a hole surrounded by the upper half of the gate oxide layer 3. The depth of the hole Between 0.1~30μm;

[0053] Step 4: Next, perform field oxygen oxidation on the hole to form an oxide layer on the sidewall of the hole and the bottom of the hole, and the shape of the bottom of the hole is an upward concave arc, and the hole is concave upward. The ...

Embodiment 3

[0059] Combine below Figure 17 ~ Figure 25 To explain the present invention in detail, a method for preparing a vertical bidirectional voltage-resistant power semiconductor transistor includes:

[0060] The first step: first select an N-type silicon material as the substrate and epitaxially grow an N-type epitaxial layer 2;

[0061] Step 2: Next, a vertical metal oxide semiconductor field effect transistor is fabricated, and a trench is first etched on the N-type epitaxial layer 2 with a mask;

[0062] Step 3: Next, grow a gate oxide layer 3 on the trench surface, deposit polysilicon, and then etch the upper part of the polysilicon to form a hole surrounded by the upper half of the gate oxide layer 3. The depth of the hole Between 0.1~30μm;

[0063] Step 4: Next, perform field oxygen oxidation on the hole to form an oxide layer on the sidewall of the hole and the bottom of the hole, and the shape of the bottom of the hole is an upward concave arc, and the hole is concave upward. The...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a longitudinal two-way voltage-withstanding power semiconductor transistor and a preparation method thereof, which are characterized by comprising an N-type drain. An N-type epitaxial layer is arranged on the N-type drain; a first P-type body region is arranged on the N-type epitaxial layer; an N-type buffer layer is arranged on the first P-type body region; a heavily-doped N-type source is arranged on the N-type buffer layer; a source metal layer is connected onto the surface of the heavily-doped N-type source; the N-type epitaxial layer, the first P-type body region, the N-type buffer layer and the heavily-doped N-type source are internally provided with a step groove; the second part of the step groove is located above the first part of the step groove; the inner surface of the first part of the step groove is provided with a gate oxidation layer; the gate oxidation layer is filled with polycrystalline silicon and a polycrystalline silicon gate is formed; the second part of the step groove is filled with a first oxidation layer; and a second P-type body region is arranged inside the N-type buffer layer. The preparation method of the invention keeps the traditional groove metal oxide semiconductor-type field effect transistor preparation method, the realization is easy, and the cost is low.

Description

Technical field [0001] The present invention mainly relates to the technical field of power semiconductor devices, in particular to a longitudinal bidirectional withstand voltage power semiconductor transistor and a preparation method thereof, and is particularly suitable for charging and protecting circuits of lithium batteries in electronic products such as smart phones, notebook computers, and digital cameras. Background technique [0002] At present, rechargeable lithium batteries are favored by small-sized portable electronic devices such as mobile smart phones and digital cameras due to their unique advantages such as small chip area and high energy density. Rechargeable lithium batteries have two working modes: charging and discharging, and the current flows in opposite directions under these two working modes. In order to prevent the lithium battery from overheating and life shortening caused by overcharge or overdischarge of the lithium battery, usually a bidirectional s...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06H01L29/423H01L21/336
CPCH01L29/0611H01L29/0684H01L29/4236H01L29/42364H01L29/42376H01L29/66666H01L29/7827
Inventor 祝靖孙轶杨卓孙伟锋陆生礼时龙兴
Owner SOUTHEAST UNIV