Digital filter filtering single clock cycle pulses and glitches

Abstract

The invention discloses a digital filter filtering single clock cycle pulses and glitches, which comprises a voltage comparator, a first logic circuit and a second logic circuit, wherein the first input end of the voltage comparator is connected with the QN end of the second logic circuit; the second input end of the voltage comparator inputs standard clock signals; the output end of the voltage comparator is connected with the CLK end of the first logic circuit; the D end of the first logic circuit is respectively connected with the QN end of the first logic circuit and the CLK end of the second logic circuit; the D end of the second logic circuit is connected with the QN end of the second logic circuit; and the NCLK end of the first logic circuit and the NCLK end of the second logic circuit both input original digital signals. The standard fixing clock and a capacitance delay mode by current are combined, comparatively large flexibility and space are provided for system design, and system design complexity is reduced.

Description

technical field [0001] The invention relates to an integrated circuit, in particular to a digital filter for filtering single clock cycle pulses and burrs. Background technique [0002] There are two ways of traditional digital pulse and glitch filtering: [0003] (1) Use a standard analog resistance-capacitance circuit to filter out digital pulses and burrs; [0004] (2) Filter out digital pulses and burrs by using the delay mode of electric current to capacitance. [0005] But all there is following defect in above-mentioned two kinds of ways: [0006] (1) The digital filtering method of the standard analog electronic circuit cannot effectively eliminate the influence of parasitic parameters, accuracy, temperature, etc. of the device in the analog circuit due to its complex and slow principle, so that the filtering is not stable and reduces the system performance. reliability. [0007] (2) The digital filtering method using the delay mode of current to capacitance will...

AI Technical Summary

Problems solved by technology

[0006] (1) The digital filtering method of the standard analog electronic circuit cannot effectively eliminate the influence of parasitic parameters, accuracy, temperature, etc. of the device in the analog circuit due to its complex and slow principle, so that the filtering is not stable and reduces the system performance. reliability

[0007] (2) The digital filtering method using the current-to-capacitor delay method will make the system design more complicated and increase the difficulty of the design. There will also be difficulties in the selection of the filter capacitor, and the time cannot be effectively used.

[0008] Therefore, the above two methods both waste area and time, and the accuracy is not high, which shows great limitations in the design of modern new electronic systems, thus limiting the flexibility of design

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