Fan-out package structure and its production process

Abstract

The invention relates to a fan-out packaging structure and its production process, which is characterized in that: it includes a core board, a chip is arranged in a groove on the core board, a pad is provided on the front side of the chip, and bumps are arranged on the pad; The board, the chip, and the dielectric material on the front and back of the chip are pressed together, the pads and bumps on the front of the chip are embedded in the dielectric material, and the gap between the chip and the tank is filled with the dielectric material; the dielectric material on the back of the chip A metal layer is provided on the outer surface, a solder resist layer is provided on the outer surface of the dielectric material on the front of the chip, an RDL circuit layer is arranged in the solder resist layer, and BGA balls are arranged on the pads of the RDL circuit layer; the dielectric material on the front of the chip The material is provided with laser blind holes, which are filled with electroplated metal, and the RDL circuit layer is interconnected with the bumps on the front of the chip through the electroplated metal in the laser blind holes. The invention eliminates the restrictive condition of the active chip embedded in the organic substrate, improves the yield rate of device packaging, and reduces the cost of fan-out packaging.

Description

technical field [0001] The invention relates to a fan-out packaging structure and a production process thereof, belonging to the technical field of advanced microelectronic packaging. Background technique [0002] At present, the mainstream fan-out packaging is still based on the injection molding (molding) method based on the wafer process. Among them, the main fan-out RDL uses sputtered metal film as the seed layer or wafer. The thermal management of the package made by this structure The performance is very limited, and the process also has the characteristics of high cost and complicated process, which leads to high cost and low performance. [0003] At present, in the chip embedding process based on the substrate, the electroless plating seed layer process is used to metallize the blind holes, but there are certain restrictions on the pad material of the chip in the electroless plating process. Contents of the invention [0004] The purpose of the present invention i...

AI Technical Summary

Problems solved by technology

[0002] At present, the mainstream fan-out packaging is still based on the injection molding (molding) method based on the wafer process. Among them, the main fan-out RDL uses sputtered metal film as the seed layer or wafer. The thermal management of the package made by this structure The performance is very limited. In addition, the process also has the characteristics of high cost and complicated process, which leads to high cost and low performance.

[0003] At present, in the process of chip embedding based on the substrate, the process of electroless plating seed layer is used to metallize the blind holes, but there are certain restrictions on the material of the pad (pad) of the chip in the process of electroless plating.

Images