Semiconductor device

A semiconductor and conductive technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., can solve problems such as drop, damage to the anode electrode and PIN diode adhesion, surge withstand drop, etc.

Active Publication Date: 2016-01-27
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, if the bonding wire is placed directly above or near the PIN diode, the current will concentrate on the PIN diode, which may lower its surge withstand capacity, or

Method used

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  • Semiconductor device
  • Semiconductor device
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Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0020] figure 1 (a) is a schematic plan view showing the semiconductor device according to the first embodiment, figure 1 (b) is a schematic cross-sectional view showing the semiconductor device according to the first embodiment.

[0021] figure 2 (a) and figure 2 (b) is a schematic cross-sectional view showing the semiconductor device according to the first embodiment.

[0022] here, in figure 1 (b) means figure 1 (a) BB' line section.

[0023] exist figure 2 In (a), it means that there is no configuration figure 1 The AA' line cross-section of the semiconductor region 35 in (a), at figure 2 In (b), it means that the configuration has figure 1 The BB' line cross section of the semiconductor region 35 in (a).

[0024] In addition, in figure 1 Not shown in (a) figure 1 (b) The anode electrode 11 shown.

[0025] Such as figure 1 (a)~ figure 2 As shown in (b), the semiconductor device 1 according to the first embodiment includes a cathode electrode 10 (first e...

no. 2 Embodiment approach

[0067] Figure 7 (a) is a schematic plan view showing a semiconductor device according to a first example of the second embodiment, Figure 7 (b) is a schematic plan view showing a semiconductor device according to a second example of the second embodiment.

[0068] Figure 8 (a) is a schematic plan view showing a semiconductor device according to a third example of the second embodiment, Figure 8 (b) is a schematic plan view showing a semiconductor device according to a fourth example of the second embodiment, Figure 8 (c) is a schematic plan view showing a semiconductor device according to a fifth example of the second embodiment.

[0069] exist Figure 7 In the semiconductor device 2 shown in (a), the adjacent bonding portions 50c are shifted in the Y direction and arranged in the X direction. Here, the distance d1 between the bonding portion 50c and the second region 40b and the distance d2 between the bonding portion 50c and the first region 40a may be substantially ...

no. 3 Embodiment approach

[0075] Figure 9 (a) is a schematic plan view showing a semiconductor device according to a first example of the third embodiment, Figure 9 (b) is a schematic plan view showing a semiconductor device according to a second example of the third embodiment.

[0076] exist Figure 9 In the semiconductor device 6 shown in (a), one wiring 50 has a plurality of bonding portions 50c. With such a structure, the number of wires 50 can be reduced. For example, the joint portions 50c aligned in the Y direction are connected by a loop-shaped connection portion 50rp. Also, the plurality of bonding portions 50 c are surrounded by the silicide regions 40 , respectively.

[0077] Here, the distance d1 between the joining portion 50c and the second region 40b and the distance d2 between the joining portion 50c and the portion 40aa of the first region 40a may be substantially the same. In addition, the distance d3 between the bonding portion 50c and the second region 40b and the distance d...

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PUM

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Abstract

An embodiment of the invention provides a semiconductor device capable of suppressing the reduction in connection between an anode and a diode and the reduction in surgetolerance dose of the diode. The semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.

Description

[0001] related application [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2014-126256 (filing date: June 19, 2014). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments of the present invention relate to semiconductor devices. Background technique [0004] As a semiconductor device having a rectification function, a JBS (Junction Barrier Schottky) diode in which a Schottky barrier junction and a pn junction are mixed is known. A JBS diode has a plurality of p-type semiconductor regions formed in an n-type semiconductor region, and a Schottky barrier metal in contact with the n-type semiconductor region and the p-type semiconductor region. The JBS diode has a structure that relaxes the electric field at the interface between the n-type semiconductor region and the Schottky electrode at the time of reverse bias to ...

Claims

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Application Information

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IPC IPC(8): H01L29/872H01L29/06
CPCH01L23/4824H01L23/4827H01L24/05H01L24/48H01L24/49H01L29/0619H01L29/1608H01L29/872H01L2224/04042H01L2224/4813H01L2224/4846H01L2224/4847H01L2224/491H01L2924/00014H01L2224/45099H01L2224/45015H01L2924/207H01L23/482
Inventor 堀阳一野田隆夫大田刚志
Owner KK TOSHIBA
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