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Semiconductor package and a method for fabricating the same

A semiconductor and packaging technology, applied in the field of semiconductor packaging and its manufacturing method, can solve the problems of increasing the cost and time of the manufacturing process, and the complexity of the manufacturing process, and achieve the effect of reducing costs and shortening the process steps

Inactive Publication Date: 2016-02-10
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] However, the manufacturing process of the aforementioned existing semiconductor packages is relatively complicated, which increases the overall manufacturing process cost and time

Method used

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  • Semiconductor package and a method for fabricating the same
  • Semiconductor package and a method for fabricating the same
  • Semiconductor package and a method for fabricating the same

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Embodiment Construction

[0047] The implementation of the present invention will be described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0048] It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for the understanding and reading of those skilled in the art, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the same time, the terms quoted in this specificatio...

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Abstract

A semiconductor package and a method for fabricating the same are provided. The semiconductor package includes a substrate, a semiconductor chip disposed on the substrate, an encapsulant formed on the substrate and encapsulating the semiconductor chip, a circuit layer formed on an active surface of the semiconductor chip and the encapsulant, and a conductive via penetrating the substrate and electrically connected to the circuit and the substrate. The cost and fabrication time of the semiconductor package are reduced.

Description

technical field [0001] The present invention relates to a semiconductor package and its manufacturing method, especially to a semiconductor package of chip size package type and its manufacturing method. Background technique [0002] With the evolution of semiconductor technology, different packaging product types of semiconductor products have been developed. In order to pursue the lightness, thinness and shortness of semiconductor packages, a Chip Scale Package (CSP) has been developed, which is characterized in that the chip Size packages are only of equal or slightly larger size than the die size. [0003] Figure 1A to Figure 1I What is shown is a cross-sectional view of a manufacturing method of a conventional semiconductor package. [0004] Such as Figure 1A As shown, a first carrier board 10 is provided, and a release layer 11 is formed thereon. [0005] Such as Figure 1B As shown, a plurality of semiconductor wafers 12 with opposite active surfaces 12a and non...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L21/56
CPCH01L21/568H01L24/96H01L24/97H01L2224/12105H01L2224/19H01L2224/32245H01L2224/73267H01L2224/97H01L2924/18162H01L2224/83H01L2924/00012
Inventor 陈彦亨林畯棠纪杰元詹慕萱
Owner SILICONWARE PRECISION IND CO LTD