LPC host controller apparatus based on AMBA bus architecture

Abstract

The present invention provides an LPC host controller apparatus based on an AMBA bus architecture, which is used for implementing data communication between an AHB on the AMBA bus architecture and an AXI bus as well as an LPC bus and comprises: an AHB bus, the AXI bus, an AHB slave interface module, an AXI master interface module, an LPC bus interface module, an LPC main module and a DMA engine module, wherein three cycle types of data transmission, i.e. an input output, a memory and firmware, which are specified in an LPC 1.1 bus protocol, are implemented between an AHB bus interface and an LPC bus interface, and a DMA cycle type of data transmission, which is specified in the LPC 1.1 bus protocol, is implemented between an AXI bus interface and the LPC bus interface.

Description

technical field [0001] The invention belongs to the field of integrated circuit logic design, in particular to a LPC (LowPinCount, low number of pins) host controller (HOST controller) device based on the AMBA (AdvancedMicrocontrollerBusArchitecture) bus architecture, which realizes each bus on the AMBA bus architecture and Data communication between LPC buses. Background technique [0002] The LPC bus is a data address command multiplexing bus defined by Intel Corporation, and the operating frequency is 33MHz. In the field of industrial computers, the LPC bus has replaced ISA and other interfaces to become a standard interface. [0003] At present, many LPC host controllers are based on PCI-Express architecture or self-defined dedicated bus architecture to realize the data communication function between a certain device and LPC equipment. For the LPC host controller of the PCI-Express architecture, due to the complexity of the PCI-Express protocol, the realization of the ...

AI Technical Summary

Problems solved by technology

For the LPC host controller of the PCI-Express architecture, due to the complexity of the PCI-Express protocol, the realization of the LPC host controller is more difficult, and for the LPC controller of the custom dedicated bus architecture, its specificity limits it. It can only be used in a specific special occasion, and does not have universality; in addition, when implementing the DMA (DirectMemoryAccess, memory direct access) function, an additional DMA controller is required, and the additional DMA controller is not dedicated to the LPC host controller , but also to meet the DMA service requirements of other components in the system

Therefore, the development of the LPC host controller based on the above two architectures is difficult, the portability is poor, and the DMA service efficiency is low and other shortcomings need to be solved urgently

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