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Time synchronization device based on domestic FPGA and uclinux operation system

A technology of time synchronization device and operating system, which is applied in time division multiplexing systems, signal generation/distribution, electrical components, etc. The effect of localization rate and good transplantability

Inactive Publication Date: 2016-04-20
NO 32 RES INST OF CHINA ELECTRONICS TECH GRP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] Aiming at defects such as non-localization and poor portability of the time synchronization system existing in the prior art, the purpose of the present invention is to provide a time synchronization device based on domestic FPGA and uclinux operating system, which solves the following technical problems: question:

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  • Time synchronization device based on domestic FPGA and uclinux operation system

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Embodiment

[0033] This embodiment provides a kind of time synchronization device based on domestic FPGA and uclinux operating system, including: domestic FPGA core processing circuit and time communication interface circuit, wherein: domestic FPGA core processing circuit is connected with terminal equipment and is used for carrying out information with terminal equipment Interaction; the domestic FPGA core processing circuit is connected to the time service network server to obtain time information to calibrate the local system time; the domestic FPGA core processing circuit is connected to the time communication interface circuit, and the local system time information after calibration is transmitted to the time communication interface circuit; time The communication interface circuit is connected with the non-time synchronization equipment, so as to transmit the system time information to the non-time synchronization equipment.

[0034]Further, the domestic FPGA core processing circuit ...

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Abstract

The invention provides a time synchronization device based on a domestic FPGA and uclinux operation system, comprising an FPGA core processing circuit and a time communication interface circuit; the domestic FPGA core processing circuit is equipped with a terminal device interface which is connected to a terminal device so as to carry out information interaction; a time network server interface which is connected to a time network server so as to obtain time information and calibrate local system time; and a time information interface which is connected to the time communication interface circuit. The domestic FPGA core processing circuit transmits the calibrated local system time information to the time communication interface circuit through the time information interface, is connected to a non-time synchronization device through the time communication interface circuit and transmits the calibrated local system time information to the non-time synchronization device. According to the invention, the transportability of the time synchronization system is promoted, and the smooth upgrade from the non-time synchronization device to the time synchronization device is realized.

Description

technical field [0001] The invention relates to the technical field of time synchronization based on the IEEE1588 protocol, in particular to a time synchronization device based on domestic FPGA and uclinux operating system. Background technique [0002] Time synchronization systems are widely used in many fields. The world situation is unpredictable, and localization is of great significance for improving my country's independent equipment support capabilities, but there are few localized time synchronization systems at present. In the entire national economic sector of our country, including the central financial system, power system, and traffic control system, information systems are used. The equipment in these sectors is currently mainly based on foreign software and hardware, which poses a serious threat to my country's information security. threaten. [0003] The existing localized technology for time synchronization mainly improves the performance of the time synchr...

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Application Information

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IPC IPC(8): H04J3/06G06F1/12
CPCH04J3/0635G06F1/12
Inventor 李红海邱振飞杜美霞
Owner NO 32 RES INST OF CHINA ELECTRONICS TECH GRP