Memory element and its manufacturing method
A technology of storage elements and manufacturing methods, applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve problems such as lowering product reliability, deformation of capacitor structure, and dumping, and achieve the effect of avoiding deformation or even dumping
Active Publication Date: 2018-09-14
WINBOND ELECTRONICS CORP
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Problems solved by technology
However, the above method easily leads to the problem of insufficient mechanical strength of the capacitor itself and the problem of short circuit (Short) of adjacent capacitors.
When the mechanical strength of the capacitor is insufficient, it is easy to find that the capacitor structure is deformed or even dumped; and when the adjacent capacitor is short-circuited, the reliability of the product will be reduced (Reliability)
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[0033] Figure 1A to Figure 1H It is a schematic top view of the manufacturing process of the storage element according to the first embodiment of the present invention. Figure 2A to Figure 2H respectively along Figure 1A to Figure 1H A schematic cross-sectional view of the line A-A. Figure 3A to Figure 3H respectively along Figure 1A to Figure 1H A schematic cross-sectional view of the B-B line.
[0034] Please also refer to Figure 1A , Figure 2A as well as Figure 3A , firstly, a substrate 100 is provided. The substrate 100 is, for example, a semiconductor substrate, a semiconductor compound substrate, or a semiconductor over insulator substrate (Semiconductor Over Insulator, SOI for short). Semiconductors are, for example, atoms of group IVA, such as silicon or germanium. The semiconductor compound is, for example, a semiconductor compound formed of atoms of group IVA, such as silicon carbide or germanium silicide, or a semiconductor compound formed of atoms of g...
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The invention provides a storage element and a manufacturing method thereof. The storage element comprises a plurality of cup-shaped capacitors, a bottom supporting layer and a top supporting layer. The cup-shaped capacitors are arranged on a substrate. The bottom supporting layer is configured on the substrate between a plurality of lower side walls of the cup-shaped capacitors. The top supporting layer is configured around a plurality of upper side walls of the cup-shaped capacitors. A gap is formed between the top supporting layer and the bottom supporting layer. The top supporting layer comprises a peripheral supporting layer and a core supporting layer. The peripheral supporting layer is configured on the periphery of the cup-shaped capacitors and is connected with the cup-shaped capacitors. The core supporting layer is configured in the peripheral supporting layer. A gap is formed between the core supporting layer and the peripheral supporting layer. The core supporting layer is connected with any two adjacent cup-shaped capacitors.
Description
technical field [0001] The present invention relates to a memory element and its manufacturing method. Background technique [0002] With the miniaturization of semiconductor technology, the traditional capacitor technology is no longer sufficient. Researchers develop dielectric materials with high dielectric constants and increase the surface area of capacitors to increase the capacitance of capacitors. In general, the most common way to increase surface area is to increase capacitor height or size. However, the above method easily leads to the problem of insufficient mechanical strength of the capacitor itself and the problem of short circuit (Short) of adjacent capacitors. When the mechanical strength of the capacitor is insufficient, it is easy to find that the capacitor structure is deformed or even collapsed; and when the adjacent capacitor is short-circuited, the reliability of the product will be reduced. In view of this, how to prevent adjacent capacitors from s...
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IPC IPC(8): H01L27/01H01L21/70
Inventor 林志豪张嘉凯
Owner WINBOND ELECTRONICS CORP