High Sensitivity Digital Phase Locked Loop
A digital phase-locked loop and digital phase detector technology, applied in the direction of automatic power control, electrical components, etc., can solve the problems of inaccurate phase locking of modulation signals, poor flexibility and low sensitivity of hardware phase-locked circuits, and achieve universal The effect of strong performance, high sensitivity and strong anti-interference
Active Publication Date: 2018-09-25
DFINE TECH
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Problems solved by technology
[0002] At present, in most radio frequency circuits, hardware phase-locked circuits are used. There are many devices used, responsible power supply, low reliability, and low sensitivity.
In addition, the flexibility of the hardware phase-locking circuit is poor, and the phase-locking of the modulated signal is not very accurate
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[0023] The technical scheme of the present invention is described in further detail below in conjunction with accompanying drawing:
[0024] Such as figure 1 As shown, the high-sensitivity digital phase-locked loop includes a band-pass filter, a first digital mixer, a second digital mixer, a digital local oscillator, a 90-degree phase shifter, a first low-pass filter, and a second low-pass filter. Pass filter, digital phase detector, 1K modulated local oscillator, first synchronous detector, second synchronous detector, second phase shifter, band-pass filter receives 14 AD sampling inputs from outside, band-pass filter The output terminals of the digital local oscillator are respectively connected with the first digital mixer and the second digital mixer, the first output terminal of the digital local oscillator is connected with the first digital mixer, and the second output terminal of the digital local oscillator is shifted by 90 degrees The device is connected with the se...
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The invention discloses a high-sensitivity digital phase-locked loop. A band-pass filter, a first digital frequency mixer, a second digital frequency mixer, a digital local oscillator, a 90-degree phase shifter, a first low pass filter, a second low pass filter, a digital phase discriminator, a modulation local oscillator, a first synchronous detector, a second synchronous detector and a second phase shifter in the digital phase-locked loop are implemented through a microprocessor based on an FPGA (Field Programmable Gate Array). Through adoption of a pure digital software processing way, a very weak useful signal is locked, and relevant information can be extracted accurately, so that high-reliability signal locking in a very complicated environment is realized. On the aspect of weak signal processing, the useful signal can be extracted accurately through digital FFT (Fast Fourier Transform) processing, so that a signal-to-noise ratio requirement supported by hardware is met, and noise and the useful signal cannot be distinguished by the hardware when the signal is very weak.
Description
technical field [0001] The invention relates to a high-sensitivity digital phase-locked loop. Background technique [0002] At present, in most radio frequency circuits, hardware phase-locked circuits are used, and there are many devices used, responsible power supply, low reliability, and low sensitivity. In addition, the flexibility of the hardware phase-locking circuit is poor, and the phase-locking of the modulation signal is not very accurate. [0003] With the development of digital circuit technology, digital phase-locked loops have been widely used in various aspects such as modulation and demodulation, frequency synthesis, FM stereo decoding, color subcarrier synchronization, and image processing. The digital phase-locked loop not only absorbs the advantages of high reliability, small size, and low price of the digital circuit, but also solves the shortcomings of the analog phase-locked loop such as DC zero drift, device saturation, and susceptibility to power supp...
Claims
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IPC IPC(8): H03L7/093H03L7/095
CPCH03L7/093H03L7/095H03L2207/50
Inventor 徐建彪陈波赵天新徐克兴
Owner DFINE TECH