Optimized phase change memory architecture
A phase-change memory and architecture technology, which is applied in the fields of instruments, generation of response errors, electrical digital data processing, etc., can solve problems such as the accumulation of read interference, the inability to fully improve the read voltage, and the different physical characteristics. , to prevent the problem of read interference, increase the length of the check field, and improve the reading speed
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[0047] Example 1
[0048] Assuming that the length of a PCM row data field is 8, the data field grouping process using the present invention to optimize the phase change memory architecture includes the following steps:
[0049] (1) When writing data, when the writing voltage rises to the reading voltage, the bits that have written data are recorded as vulnerable bits, and data is written in sequence. During the writing process, according to the position of the vulnerable bits Divide the data field into four groups. The division process is as follows:
[0050] Because the data length is 8, the 8-bit data field can construct log 2 8=3 Patterns, Patterns are:
[0051] Pattern00 (difference eigenvalue is 001)
[0052] 1
[0053] Pattern01 (difference eigenvalue is 010)
[0054] 1
[0055] Pattern10 (difference eigenvalue is 100)
[0056] 1
[0057] For example, if Pattern00 is used, the check field record is 00+check code of group 1+check code ...
Example Embodiment
[0065] Example 2
[0066] Assuming that the length of a PCM row data field is 16, the data field grouping process using the present invention to optimize the phase change memory architecture includes the following steps:
[0067] (1) When writing data, when the writing voltage rises to the reading voltage, the bits that have written data are recorded as vulnerable bits, and data is written in sequence. During the writing process, according to the position of the vulnerable bits Divide the data field into four groups. The division process is as follows:
[0068] 16-bit data field can construct log 2 16=4 Patterns, the index length needs to be log 2 (log 2 16)=2, Pattern are:
[0069] Pattern00 (difference eigenvalue is 0001)
[0070] 1
[0071] Pattern01 (difference eigenvalue is 0010)
[0072] 1
[0073] Pattern10 (difference eigenvalue is 0100)
[0074] 1
[0075] Pattern11 (difference eigenvalue is 1000)
[0076] 1
[0077] Ea...
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