Formation method of flash
A flash memory and flat-layer technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of flash memory data retention (data retention) decline and other issues
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[0029] As mentioned in the background, the existing methods for forming flash memory lead to the phenomenon that the formed flash memory is prone to decline in data retention capability, that is, data loss is prone to occur.
[0030] Figure 1 to Figure 3 A schematic structural diagram corresponding to each step of the existing flash memory forming method is shown.
[0031] Please refer to figure 1 , a semiconductor substrate 100 is provided, and the semiconductor substrate 100 includes a core region 100A and a peripheral region 100B. And a tunneling dielectric layer is formed on the semiconductor substrate 100, and the tunneling dielectric layer located on the core region 100A is the tunneling dielectric layer 102a. The tunneling dielectric layer on the peripheral region 100B is the tunneling dielectric layer 102b. The core area 100A and the peripheral area 100B are separated by a dotted line (not marked) to show the difference.
[0032] Please continue to refer figure ...
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