Subthreshold level shifter having wide input voltage range

A level shifter and voltage range technology, applied in logic circuits, electrical components, logic circuit connection/interface layout, etc., can solve problems such as large power leakage, long delay time, narrow input level range, etc., and achieve power consumption Low, small power leakage, and the effect of reducing quiescent current

Active Publication Date: 2016-09-21
SHENZHEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The author proposes a new type of level shifter with ultra-low core voltage and wide I / O voltage range, but the lowest input level can only reach 0.6V, which cannot realize the conversion from the level below the threshold to the level above the threshold
[0009] The level converters proposed in the above literature generally have the problems of relatively large power leakage, narrow input level range, and long delay time from low level to high level conversion. As described in the literature [1], each transistor The energy consumption is as high as 93.9fJ; the input level in the literature [2] can only reach 0.6V

Method used

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  • Subthreshold level shifter having wide input voltage range
  • Subthreshold level shifter having wide input voltage range
  • Subthreshold level shifter having wide input voltage range

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Embodiment Construction

[0027] The structure of the sub-threshold level shifter in Embodiment 1 of the present invention is as follows Figure 4shown, including the Wilson current mirror and inverter. The Wilson current mirror includes three PMOS MP1, MP2, MP3 and two NMOS MN1, MN2. The sources of PMOS MP1 and PMOS MP2 are connected to a high power supply voltage VDDH. The drain of PMOS MP1 is connected to the source of PMOS MP3, the drain of PMOS MP3 is connected to the drain of NMOS MN1, and the source of NMOS MN1 is grounded. The drain of the PMOS MP2 is connected to the drain of the NMOS MN2, and the source of the NMOS MN2 is grounded. The gates of PMOS MP1 and PMOS MP2 are connected to the drain of PMOS MP1, and the gate of PMOS MP3 is connected to the drain of PMOS MP2.

[0028] The power input terminal of the inverter is connected to the low power supply voltage VDDL, the input terminal of the inverter is connected to the input level IN, and the output terminal of the inverter outputs the l...

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PUM

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Abstract

The invention discloses a subthreshold level shifter having a wide input voltage range. The subthreshold level shifter comprises a Wilson current mirror and an inverter. The Wilson current mirror comprises three PMOS and two NMOS. The source electrode of the first PMOS and the source electrode of the second PMOS are connected with a high power supply voltage. The drain electrode of the first PMOS is connected with the source electrode of the third PMOS, and the drain electrode of the third PMOS is connected with the drain electrode of the first NMOS, and the source electrode of the first NMOS is grounded. The drain electrode of the second PMOS is connected with the drain electrode of the second NMOS, and the source electrode of the second NMOS is grounded. The grid of the first PMOS and the grid of the second PMOS are connected with the drain electrode of the first PMOS, and the grid of the third PMOS is connected with the drain electrode of the second PMOS. The grid of the first NMOS is used as the first input end of the Wilson current mirror, and is connected with one end of the inverter, and the grid of the second NMOS is used as the second input end of the Wilson current mirror, and is connected with the other end of the inverter. The drain electrode of the second PMOS is the output end of the Wilson current mirror, and the inverter is connected with an input level. The subthreshold level shifter is used to solve the voltage drop problem of the Wilson current mirror structure and a power consumption problem of a cross coupling structure under a subthreshold voltage.

Description

[technical field] [0001] The present invention relates to integrated circuits, in particular to a sub-threshold level shifter with a wide input voltage range. [Background technique] [0002] Multi-supply voltage domain (Multi-supply voltage domain) technology is more and more widely used in system-on-chip (SoC) and multi-core computing structures. In a chip using multiple power supply voltage domain technology, there are usually multiple independent voltage regions or voltage islands, and the modules in each voltage domain work under the appropriate power supply voltage according to its timing requirements. Generally speaking, for timing-critical modules, they usually work at a high power supply voltage (VDDH) to meet the speed performance requirements of the chip; while for timing-uncritical circuit modules, it works at a lower power supply voltage (VDDL) or even under the sub-threshold power supply voltage to reduce the power consumption and energy consumption of the chip...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0185
CPCH03K19/018507
Inventor 曹元赵晓锦温志煌
Owner SHENZHEN UNIV
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