Power weight quantification-based nerve network forward operation hardware structure

Abstract

The invention provides a power weight quantification-based nerve network forward operation hardware structure comprising the following elements: an input buffer memory module used for caching input data and nerve network power weight transferred to a chip from a global memory, wherein the nerve network power weight comprises a convolution core and a full-connecting matrix; a computing module used for carrying out convolution and full-connecting matrix vector multiplying operation based on power weight quantification; an output buffer memory module used for caching the convolution and full-connecting matrix vector multiplying operational result obtained by the computing module; a control module used for carrying out data transfer and operational resource scheduling for the input buffer memory module, the computing module and the output buffer memory module. The power weight quantification-based nerve network forward operation hardware structure can effectively reduce the nerve network memory space, and can effectively reduce nerve network operational expenses, thus obviously improving the application space of the nerve network calculating system on the terminal equipment.

Description

technical field [0001] The invention relates to the technical fields of computer and electronic information, in particular to a forward computing hardware structure of a neural network based on power weight quantization. Background technique [0002] With the continuous increase in the scale of deep neural networks (storage capacity of hundreds of MB) and computation (single forward run of 10GFPLOS), existing smart terminal devices (such as mobile phones) are no longer able to support large-scale neural networks. Therefore, how to effectively reduce the amount of storage and calculation of deep neural network applications becomes very important. By means of weight quantization, or converting the weights into fixed-point numbers, or establishing a quantized weight codebook, the model can be effectively compressed and the storage capacity of the neural network can be reduced. Therefore, how to design an effective quantization method, and then design an efficient hardware stru...

AI Technical Summary

Problems solved by technology

Although this method can greatly reduce the storage capacity by reducing the code length, the low-bit code needs to be re-decoded into a high-bit floating-point number during calculation, so a floating-point multiplier is still required, and its computational overhead is still very high. High; in addition, with the operation of low-bit encoding and decoding into high-bit floating-point numbers, a

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