an fft processor

Abstract

The invention discloses an FFT processor. A radix-2 butterfly operation unit of the FFT processor at least comprises an exponent alignment circuit, an operation unit and a normalization circuit. The exponent alignment circuit transmits a unified exponent part of floating point input data after exponent alignment to the normalization circuit; the operation unit receives a cardinal number part of the floating point input data after the exponent alignment and executes corresponding FFT operation; the normalization circuit executes exponent normalization processing on an operation result of the operation unit according to the exponent part to generate floating point output data; and the operation unit comprises one or more fixed point adders, fixed point multipliers and / or fixed point subtractors. According to a pseudo floating point operation structure, a plurality of data sharing exponent fields are not needed, the calculation precision is relatively high, the granularity of prefix alignment operation is relatively small, and the calculation scale and the time delay are both much smaller than those of an existing block floating point structure, so that the pseudo floating point operation structure is more suitably applied to pipeline structure realization.

Description

technical field [0001] The invention relates to the technical field of electronic communication, in particular to an FFT processor. Background technique [0002] Fast Discrete Fourier Transform (FFT) / Fast Inverse Fourier Transform (IFFT) is a fast implementation of Discrete Fourier Transform (DFT) / Discrete Inverse Fourier Transform (IDFT), which is commonly used in digital signal processing technology. [0003] Since the DFT / FFT operation is basically the same as the IDFT / IFFT operation process, the same circuit implementation method can be used for FFT and IFFT. [0004] Cooley and Tukey invented the FFT algorithm. The basic idea of ​​FFT is to decompose the original N-point sequence into two or more shorter sequences and recombine them into the DFT of the original sequence, so that the number of operations of the indirect algorithm is higher than that of the direct calculation of DFT. The number of operations is much less, thereby improving the calculation speed of DFT. ...

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Problems solved by technology

[0021] In view of the deficiencies in the prior art above, the purpose of the present invention is to provide an FFT processor, which aims to solve the problems that the existing FFT processor occupies a large amount of circuit resources, and the data format does not match the pipeline circuit structure.

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