A fpga memory splitting method

Abstract

The invention relates to an FPGA memory splitting method. The method comprises the steps of determining a minimum particle size according to an instance size of an RAM instance and primitive sizes of various RAM primitives existent on an FPGA chip; splitting the RAM instance according to the minimum particle size to obtain a primitive matrix; and combining address buses and / or data buses of the primitive matrix to obtain an RAM instance consisting of an RAM primitive. The splitting method provided by an embodiment of the invention is simple and easy to realize, and a splitting result is close to or achieves the best; and the RAM instance obtained by splitting is a regular matrix, so that subsequent mapping operation is greatly facilitated, the splitting and mapping operations are relatively independent, and the mapping operation does not need to be modified when a combined policy is optimized.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to an FPGA memory splitting method. Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, FPGA), which emerged as a semi-custom circuit in the field of Application Specific Integrated Circuit (ASIC), not only solves the shortcomings of custom circuits, but also overcomes the The shortcomings of the limited number of gate circuits of the original programmable device are overcome. It is applicable to various fields such as logic control, signal processing, and image processing. In China alone, the FPGA chip market exceeds 10 billion yuan, and is growing at a rate of 30% per year. The importance is self-evident. [0003] In the specific design process of FPGA, since the random access memory (random access memory, RAM for short) instance size designed by the user can be arbitrary, but the RAM primitive size on the FPGA chip is fixed, when the i...

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Problems solved by technology

[0003] In the specific design process of FPGA, since the instance size of random access memory (RAM) designed by users can be arbitrary, but the RAM primitive size on the FPGA chip is fixed, when the instance size exceeds the primitive When considering the size, it is necessary to consider how to form a large RAM of the instance size from multiple small RAMs of the primitive size. The above problem is a problem of memory splitting.

FPGA memory usually has many ports and parameters, especially when multiple memories need to be spliced ​​into a larger memory, the memory mapping operation will become very complicated

Moreover, a specific model of FPGA chip usually has multiple RAM primitives of different sizes, which further increases the complexity of the problem

There are certain technical defects in the existing technology to solve the above problems, such as: the splitting method is complicated, the splitting result is inconvenient for subsequent operations, etc.

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